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W78E516DDG PDF预览

W78E516DDG

更新时间: 2024-11-20 12:27:47
品牌 Logo 应用领域
NUVOTEM TALEMA 微控制器外围集成电路装置光电二极管时钟
页数 文件大小 规格书
90页 824K
描述
8-BIT MICROCONTROLLER

W78E516DDG 数据手册

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W78E516D/W78E058D Data Sheet  
8-BIT MICROCONTROLLER  
Table of Contents-  
1
2
3
GENERAL DESCRIPTION ......................................................................................................... 4  
FEATURES................................................................................................................................. 5  
PARTS INFORMATION LIST ..................................................................................................... 6  
3.1  
Lead Free (RoHS) Parts information list......................................................................... 6  
4
5
6
7
PIN CONFIGURATIONS............................................................................................................. 7  
PIN DESCRIPTIONS .................................................................................................................. 9  
BLOCK DIAGRAM .................................................................................................................... 10  
FUNCTIONAL DESCRIPTION.................................................................................................. 11  
7.1  
7.2  
7.3  
7.4  
On-Chip Flash EPROM ................................................................................................ 11  
I/O Ports........................................................................................................................ 11  
Serial I/O....................................................................................................................... 11  
Timers........................................................................................................................... 11  
7.4.1 Clock ..............................................................................................................................12  
Interrupts....................................................................................................................... 12  
Data Pointers ................................................................................................................ 12  
Architecture................................................................................................................... 12  
7.7.1 ALU ................................................................................................................................12  
7.7.2 Accumulator ...................................................................................................................12  
7.7.3 B Register.......................................................................................................................12  
7.7.4 Program Status Word.....................................................................................................12  
7.7.5 Stack Pointer..................................................................................................................13  
7.7.6 Scratch-pad RAM ...........................................................................................................13  
7.7.7 AUX-RAM.......................................................................................................................13  
7.5  
7.6  
7.7  
8
9
MEMORY ORGANIZATION...................................................................................................... 14  
8.1  
8.2  
Program Memory (on-chip Flash)................................................................................. 14  
Scratch-pad RAM and Register Map............................................................................ 14  
8.2.1 Working Registers ..........................................................................................................16  
8.2.2 Bit addressable Locations ..............................................................................................16  
8.2.3 Stack ..............................................................................................................................16  
8.2.4 AUX-RAM.......................................................................................................................16  
SPECIAL FUNCTION REGISTERS ......................................................................................... 17  
9.1 SFR Detail Bit Descriptions .......................................................................................... 19  
10  
11  
12  
INSTRUCTION.......................................................................................................................... 37  
INSTRUCTION TIMING............................................................................................................ 45  
POWER MANAGEMENT.......................................................................................................... 46  
12.1 Idle Mode ...................................................................................................................... 46  
12.2 Power Down Mode ....................................................................................................... 46  
RESET CONDITIONS............................................................................................................... 47  
13  
Publication Release Date: Feb 15, 2011  
- 1 -  
Revision A09  

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