Datasheet > VSC9295XSM

VSC9295XSM

更新时间： 2024-01-03 19:03:51

品牌	Logo	应用领域
VITESSE		/
页数	文件大小	规格书
157页	1815K
描述
Telecom IC, PBGA1072,

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VSC9295XSM 技术参数

是否Rohs认证：	符合	生命周期：	Obsolete
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.83	JESD-30 代码：	S-PBGA-B1072
端子数量：	1072	封装主体材料：	PLASTIC/EPOXY
封装代码：	BGA	封装等效代码：	BGA1072,34X34,50
封装形状：	SQUARE	封装形式：	GRID ARRAY
电源：	1.2,1.8/2.5,2.5/3.3 V	认证状态：	Not Qualified
子类别：	Other Telecom ICs	最大压摆率：	11000 mA
表面贴装：	YES	端子形式：	BALL
端子节距：	1.27 mm	端子位置：	BOTTOM

VSC9295XSM 数据手册

VSC9295

Datasheet

340 Gbps STS-1 Time Slot Interchange Switch

• Monitors cross-connect program memory integrity

Features

• Detects loss of signal (LOS) and checks input parity;

inserts output parity, scrambling, and descrambling

• 136

non-blocking, 6528

136 time slot interchange (TSI) switch with

6528, Synchronous Transport

• Transparent mode enables switching between ports at

2.488 Gbps independent of protocol

Signal level 1 (STS-1) switch matrix yields 340 Gigabits

per second (Gbps) of aggregate bandwidth

• Static bitslice and merge device capability supports other

VSC9295 devices in a bitsliced fabric

• Bitsliced switching mode provides 13056

× 13056

connectivity at half bandwidth (68 68 ports), making it

possible to construct a single-stage 680 Gbps fabric using

just four switches

Applications

• High-speed serial TSI-to-Framer interface (TFI-5)

operates at 2.488 Gbps with both equalization and

pre-emphasis and legacy STS-12 622.08 Mbps support

• Monolithic switching

• Central switch or bitslicing engine in 340 Gbps STS-1

grooming fabrics

• Provides hitless automatic reconfiguration of

TSI mapping

• Ingress or egress device for large, multi-terabit STS-1

grooming switch fabrics

• Supports split frame domain (two domains per device)

• Supports two overhead ports for dropping and adding

overhead bytes for automatic protection switching and

in-band messaging

• Synchronous transparent crosspoint switching for generic

circuit or packet communications

General Description

The VSC9295 is a 136-port, non-blocking time slot interchange (TSI) switch. It is typically used as either an interconnection

matrix or as an input or output backplane interface.

The device incorporates a fully non-blocking STS-1 switching matrix surrounded by serial backplane interfaces that provide

fully integrated clock recovery and synthesis, input equalization, and output pre-emphasis. It supports the high-speed

TSI-to-Framer Interface Level 5 standard (TFI-5, which is an STS-48-like frame) on each of its differential serial inputs and

outputs with optional STS-12 (622 Mbps) support on a per channel basis. It can also be user-configured to operate in

configurations with 68 × 68 ports with 4x bitslicing, 136 × 34 ports with 4x bitslicing, or as a static slice and merge device in

support of other Vitesse TSI devices in a bitsliced fabric application.

Additional ports on the device provide convenient access to TFI5/SONET/SDH-compliant scrambling, framing, deskew, and

alarm capabilities, as well as overhead byte dropping or insertion. Device configuration and status monitoring are provided

using a multimode, 53 MHz CPU interface.

VMDS-10144 Revision 4.4

April 2009

Tel: (800) VITESSE • FAX: (805) 987-5896 • E-mail: webmaster@vitesse.com

Internet: www.vitesse.com

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