Datasheet > 电信电路 > ATM/SONET/SDH 集成电路> VSC8122-FECQP

VSC8122-FECQP

更新时间： 2024-01-24 17:53:33

品牌	Logo	应用领域
VITESSE		时钟
页数	文件大小	规格书
14页	347K
描述
Clock Recovery Circuit, 1-Func, PQFP64, 10 X 10 MM, HEAT SPREADER, PLASTIC, QFP-64

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技术参数
数据手册

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VSC8122-FECQP 技术参数

生命周期：	Transferred	零件包装代码：	QFP
包装说明：	FQFP, QFP64,.51SQ,20	针数：	64
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.77	应用程序：	SONET;SDH
JESD-30 代码：	S-PQFP-G64	长度：	10 mm
功能数量：	1	端子数量：	64
最高工作温度：	85 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	FQFP
封装等效代码：	QFP64,.51SQ,20	封装形状：	SQUARE
封装形式：	FLATPACK, FINE PITCH	电源：	3.3 V
认证状态：	Not Qualified	座面最大高度：	2.45 mm
子类别：	ATM/SONET/SDH ICs	最大压摆率：	0.347 mA
标称供电电压：	3.3 V	表面贴装：	YES
电信集成电路类型：	ATM/SONET/SDH CLOCK RECOVERY CIRCUIT	温度等级：	OTHER
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	10 mm
Base Number Matches：	1

VSC8122-FECQP 数据手册

VITESSE

SEMICONDUCTOR CORPORATION

Data Sheet

Multi-Rate SONET/SDH

Clock and Data Recovery IC

VSC8122

Features

• Multi-Rate OC-3, OC-12, OC-24, OC-48 Clock

• Loss of Lock Indicator

and Data Recovery

• Exceeds SONET/SDH Requirements for Jitter

Tolerance, Jitter Transfer and Jitter Generation.

• Supports Gigabit Ethernet

• 3.3V Supply Operation

• Differential Back Terminated I/O

• Maintains Clock Output in the Absence of Data

• Selectable Reference Clock

• 1W Typical Power

• 64-pin , 10x10mm PQFP Packaging

General Description

The VSC8122 is a single-chip clock recovery IC for use in SONET OC-48, OC-24, OC-12, OC-3, or Giga-

bit Ethernet systems operating at their respective 2.48832Gb/s, 1.24416Gb/s, 622.08Mbps, 155.52Mbps, or

1.25Gbps data rates. The VSC8122 complies with SONET jitter tolerance, jitter transfer and jitter generation

specifications.

Alarm functions support typical telecom system applications. The Loss of Lock (LOL) output indicates

when the device goes out of lock, which would most often occur in the event of a loss of valid data. The NOREF

output flags when the reference input to the VSC8122 either is removed, or goes severely out of tolerance.

VSC8122 Block Diagram

FSEL[1:0]

Divider

FILTO+/- FILTI+/-

CO+

CO-

DI+

DI-

Ph/Freq.

Detector

Loop

Filter

VCO

DO+

DO-

Data

Retiming

LOL

NOREF

Lock

Detect

REFCK1 +/-

REFCK0 +/-

Divider

REF_SEL[1:0]

REF_INPUTSEL

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

G52228-0, Rev 4.1

01/05/01

Page 1

12 3 4 5 6 7...14

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