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VSC7122QM PDF预览

VSC7122QM

更新时间： 2024-02-03 11:48:43
品牌 Logo 应用领域
VITESSE 光纤
页数 文件大小 规格书
12页 97K
描述
Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays

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VSC7122QM 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFP包装说明：QFP, QFP44,.5SQ,32
针数：44Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.83
JESD-30 代码：S-PQFP-G44JESD-609代码：e0
长度：10 mm功能数量：1
端子数量：44最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：QFP封装等效代码：QFP44,.5SQ,32
封装形状：SQUARE封装形式：FLATPACK
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
认证状态：Not Qualified座面最大高度：2.35 mm
子类别：Other Telecom ICs最大压摆率：0.15 mA
标称供电电压：3.3 V表面贴装：YES
技术：GAAS电信集成电路类型：TELECOM CIRCUIT
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.8 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：10 mmBase Number Matches：1

VSC7122QM 数据手册

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VITESSE  
SEMICONDUCTOR CORPORATION  
Advance Product Information  
Quad Port Bypass Circuit for 1.0625 Gbit/sec  
Fibre Channel Arbitrated Loop Disk Arrays  
VSC7122  
Features  
• Supports ANSI X3T11 1.0625 Gbit/sec  
FC-AL Disk Attach for Resiliency  
• TTL Bypass Select  
• High Speed, PECL I/O’s Referenced to VDD  
• 0.35W Typical Power Dissipation  
• 3.3V Power Supply  
.
• Fully Differential for Minimum  
Jitter Accumulation.  
• Quad PBC’s in Single Package  
• 44-Pin, 10mm PQFP  
General Description  
The VSC7122 is a Quad Port Bypass Circuit (PBC). Four Fibre Channel PBC’s are cascaded into a single  
part to minimize part count, cost, high frequency routing, and jitter accumulation. Port Bypass Circuits are used  
to provide resiliency in Fibre Channel Arbitrated Loop (FC-AL) architectures. PBC’s are used within FC-AL  
disk arrays to allow for resiliency and hot swapping of FC-AL drives.  
A Port Bypass Circuit is a 2:1 Multiplexer with two modes of operation: NORMAL and BYPASS. In NOR-  
MAL mode, the disk drive is connected to the loop. Data goes from the 7122’s L_SOn pin to the Disk Drive RX  
input and data from the disk drive TX output goes to the 7122’s L_SIn pin. Refer to Figure 2 for disk drive  
application. In BYPASS mode, the disk drive is either absent or non-functional and data bypasses to the next  
available disk drive. Normal mode is enabled with a HIGH on the SEL pin and BYPASS mode is enabled by a  
LOW on the SEL pin. Direct Attach Fibre Channel Disk Drives have an “LRC Interlock” signal defined to con-  
trol the SEL function.  
Using a VSC7122 in a single loop of a disk array is illustrated in Figure 2: “Disk Array Application”. FC-  
AL drives are all expected to be dual loop. The VSC7122 is cascaded in a manner such that all the 7122’s inter-  
nal PBC’s are used in the same loop. For dual loop implementations, two or more VSC7122’s should be used.  
Allocating each VSC7122 to only one of two loops preserves redundancy, prevents a single point of failure and  
lends itself to on-line maintainability.  
The VSC7122 is very similar to the VSC7121 except that LSO+ outputs are all full power outputs identical  
to OUT. This is useful in passive backplanes to provide additional amplitude on long traces.  
7122 Block Diagram  
1
0
1
0
1
0
1
0
IN+  
IN-  
OUT+  
OUT-  
PBC1  
PBC2  
PBC3  
PBC4  
G52155-0, Rev. 2.1  
8/31/98  
VITESSE SEMICONDUCTOR CORPORATION  
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896  
Page 1  
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