Datasheet > VSC3212YP

VSC3212YP

更新时间： 2024-01-03 07:21:59

品牌	Logo	应用领域
美高森美 - MICROSEMI		/
页数	文件大小	规格书
58页	833K
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VSC3212YP 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.79
Base Number Matches：	1

VSC3212YP 数据手册

VSC3212

Datasheet

150 Mbps to 4.25 Gbps Synchronous Crosspoint Switch

Features

Applications

• Twelve inputs, twelve outputs

• Loopback and protection switching

• Line driving and receiving

• 150 Mbps to 4.25 Gbps continuous rate coverage

• Fully nonblocking, unlimited multicast capability

• Integrated equalization on inputs and outputs

• User-programmable drive and equalization levels

• User-programmable power-down of unused ports

• Multimode programming interface

• Line re-ordering

• Signal cleanup

• Fan-out and fan-in buffering

• Zero delay clock buffering

• SAS/SATA switching

• Blade servers

• On-chip input and output terminations

• Dual power supplies: 1.2 V and 2.5 V

• High-speed backplanes

• 2.7 W typical power dissipation

• Compact flip chip ceramic ball grid array (FCCBGA)

package

• Per- channel PRBS and data generators and detectors

• Out of band (OOB) SAS/SATA signaling support

General Description

The VSC3212 is a synchronous crosspoint switch designed to regenerate and switch any non-return to zero (NRZ) serial

data stream. With a single reference clock input, the VSC3212 operates at any data rate between 150 Mbps and 4.25 Gbps

using a flexible reference clock input. Its fully nonblocking, multicast architecture allows it to be user-configured for

installation in a broad range of applications. A high degree of signal integrity is maintained by means of fully differential

inputs and outputs, integrated input and output termination, and input and output equalization. The integrated

equalization circuits are optimized to compensate for deterministic jitter that often results from wiring interconnects and

printed circuit board traces. Both input and output equalization levels are user-adjustable and provide benefits under

many types of environmental conditions.

The configuration of the device switch core and other functions in the VSC3212 are user-accessible by means of a

multimode, programmable register interface. Loop dynamics and other phase-locked loop (PLL) operational state

controls are user-configurable.

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VMDS-10126 Revision 4.1

August 2009

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: webmaster@vitesse.com

Internet: www.vitesse.com

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