5秒后页面跳转
VP386PAG PDF预览

VP386PAG

更新时间: 2024-11-25 21:16:07
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管接口集成电路
页数 文件大小 规格书
12页 112K
描述
Line Receiver, 1 Func, 8 Rcvr, CMOS, PDSO56, LEAD FREE, TSSOP-56

VP386PAG 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP-56针数:56
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.73
输入特性:DIFFERENTIAL接口集成电路类型:LINE RECEIVER
接口标准:EIA-644; TIA-644JESD-30 代码:R-PDSO-G56
JESD-609代码:e3长度:14 mm
湿度敏感等级:1功能数量:1
端子数量:56最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified最大接收延迟:
接收器位数:8座面最大高度:1.2 mm
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

VP386PAG 数据手册

 浏览型号VP386PAG的Datasheet PDF文件第2页浏览型号VP386PAG的Datasheet PDF文件第3页浏览型号VP386PAG的Datasheet PDF文件第4页浏览型号VP386PAG的Datasheet PDF文件第5页浏览型号VP386PAG的Datasheet PDF文件第6页浏览型号VP386PAG的Datasheet PDF文件第7页 
DATASHEET  
ADVANCE INFORMATION  
8/28-BIT LVDS RECEIVER FOR VIDEO  
IDTVP386  
General Description  
Features  
Wide clock frequency range from 20 MHz to 100 MHz  
The VP386 is an ideal LVDS receiver that converts 4-pair  
LVDS data streams into parallel 28 bits of CMOS/TTL data  
with bandwidth up to 2.8 Gbps throughput or 350 Mbytes  
per second.  
Pin compatible with the National DS90CF386, THine  
THC63LVDF84, TISN65LVDS94  
Converts 4-pair LVDS data streams into parallel 28 bits of  
CMOS/TTL data  
This chip is an ideal means to solve EMI and cable size  
problems associated with wide, high-speed TTL interfaces  
through very low-swing LVDS signals.  
Fully spread spectrum compatible  
LVDS voltage swing of 350 mV for low EMI  
On-chip PLL requires no external components  
Low-power CMOS design  
Falling edge clock triggered outputs  
Power-down control function  
Compatible with TIA/EIA-644 LVDS standards  
Packaged in a 56-pin TSSOP (Pb free available)  
Block Diagram  
8
RED  
RxIN0+  
RxIN0-  
8
GREEN  
8
BLUE  
RxIN1+  
RxIN1-  
RxIN2+  
RxIN2-  
RxIN3+  
RxIN3-  
LVDS to TTL  
De-serializer  
HSYNC  
VSYNC  
DATA ENABLE  
CONTROL  
RxCLKIN+  
RxCLKIN-  
RxCLKOUT  
PLL  
PWRDWN  
VP386  
8/28-BIT LVDS RECEIVER FOR VIDEO  
1
IDTVP386  
7129/3  

与VP386PAG相关器件

型号 品牌 获取价格 描述 数据表
VP3BK SWITCH

获取价格

Interconnection Device,
VP3BKX ETC

获取价格

PATCHCORD VIDEO STD 3' BLACK
VP3BLX ETC

获取价格

PATCHCORD VIDEO STD 3' BLUE
VP3GNX ETC

获取价格

PATCHCORD VIDEO STD 3' GREEN
VP3GYX ETC

获取价格

PATCHCORD VIDEO STD 3' GRAY
VP3O SWITCH

获取价格

Interconnection Device,
VP3OX ETC

获取价格

PATCHCORD VIDEO STD 3' ORANGE
VP3P SWITCH

获取价格

Interconnection Device,
VP3PX ETC

获取价格

PATCHCORD VIDEO STD 3' PURPLE
VP3RX ETC

获取价格

PATCHCORD VIDEO STD 3' RED