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VIPER100SP(022Y) PDF预览

VIPER100SP(022Y)

更新时间: 2024-11-29 21:08:07
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页数 文件大小 规格书
24页 246K
描述
5.3A SWITCHING REGULATOR, 200kHz SWITCHING FREQ-MAX, PZFM5, PENTAWATT HV-5

VIPER100SP(022Y) 技术参数

生命周期:Obsolete零件包装代码:ZFM
包装说明:,针数:5
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.74
模拟集成电路 - 其他类型:SWITCHING REGULATOR控制模式:CURRENT-MODE
控制技术:PULSE WIDTH MODULATION最大输入电压:15 V
最小输入电压:9 V标称输入电压:13 V
JESD-30 代码:R-PZFM-T5功能数量:1
端子数量:5最大输出电流:5.3 A
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:FLANGE MOUNT认证状态:Not Qualified
表面贴装:NO切换器配置:SINGLE
最大切换频率:200 kHz端子形式:THROUGH-HOLE
端子位置:ZIG-ZAGBase Number Matches:1

VIPER100SP(022Y) 数据手册

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VIPer100/SP  
VIPer100A/ASP  
SMPS PRIMARY I.C.  
Figure 2. Package  
Table 1.  
Type  
General Features  
V
I
R
DS(on)  
DSS  
n
VIPer100/SP  
620V  
700V  
3 A  
3 A  
2.5 Ω  
2.8 Ω  
VIPer100A/ASP  
ADJUSTABLE SWITCHING FREQUENCY UP  
TO 200 kHz  
PENTAWATT HV  
PENTAWATT HV (022Y)  
CURRENT MODE CONTROL  
SOFT START AND SHUTDOWN CONTROL  
AUTOMATIC BURST MODE OPERATION IN  
STAND-BY CONDITION ABLE TO MEET  
“BLUE ANGEL” NORM (<1w TOTAL POWER  
CONSUMPTION)  
DESCRIPTION  
VIPer100™/100A, made using VIPower M0  
Technology, combines on the same silicon chip a  
state-of-the-art PWM circuit together with an  
optimized, high voltage, Vertical Power MOSFET  
(620V or 700V / 3A).  
INTERNALLY TRIMMED ZENER  
REFERENCE  
UNDERVOLTAGE LOCK-OUT WITH  
Typical applications cover offline power supplies  
with a secondary power capability of 50 W in wide  
range condition and 100W in single range or with  
doubler configuration. It is compatible from both  
primary or secondary regulation loop despite  
using around 50% less components when  
compared with a discrete solution. Burst mode  
operation is an additional feature of this device,  
offering the ability to operate in stand-by mode  
without extra components.  
HYSTERESIS  
INTEGRATED START-UP SUPPLY  
OVER-TEMPERATURE PROTECTION  
LOW STAND-BY CURRENT  
ADJUSTABLE CURRENT LIMITATION  
Figure 1. Block Diagram  
DRAIN  
OSC  
ON/OFF  
OSCILLATOR  
SECURITY  
LATCH  
PWM  
LATCH  
S
FF  
S
UVLO  
LOGIC  
Q
R1  
R/S  
Q
VDD  
FF  
R2 R3  
OVERTEMP.  
DETECTOR  
0.5V  
_
+
+
_
0.5 V  
+
_
s
1 V/A  
1.7  
μ
250 ns  
BLANKING  
DELAY  
CURRENT  
AMPLIFIER  
ERROR  
AMPLIFIER  
_
+
13 V  
4.5 V  
COMP  
SOURCE  
Rev 2  
1/24  
June 2005  
www.st.com  
24  

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