5秒后页面跳转
捷配首页

Datasheet > VFC320BP/2K5
VFC320BP/2K5 PDF预览

VFC320BP/2K5

更新时间： 2024-02-03 15:17:53
品牌 Logo 应用领域
德州仪器 - TI 光电二极管转换器
页数 文件大小 规格书
12页 230K
描述
IC,VOLTAGE-TO-FREQUENCY CONVERTER,DIP,14PIN

阅读下载

获取价格

VFC320BP/2K5 技术参数

生命周期：Obsolete包装说明：DIP, DIP14,.3
Reach Compliance Code：unknown风险等级：5.84
转换器类型：VOLTAGE TO FREQUENCY CONVERTERJESD-30 代码：R-PDIP-T14
标称负供电电压：-15 V端子数量：14
最高工作温度：85 °C最低工作温度：-25 °C
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP14,.3封装形状：RECTANGULAR
封装形式：IN-LINE电源：+-15 V
认证状态：Not Qualified子类别：Analog Special Function Converters
最大压摆率：7.5 mA标称供电电压：15 V
表面贴装：NO温度等级：OTHER
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUALBase Number Matches：1

VFC320BP/2K5 数据手册

 浏览型号VFC320BP/2K5的Datasheet PDF文件第1页浏览型号VFC320BP/2K5的Datasheet PDF文件第3页浏览型号VFC320BP/2K5的Datasheet PDF文件第4页浏览型号VFC320BP/2K5的Datasheet PDF文件第5页浏览型号VFC320BP/2K5的Datasheet PDF文件第6页浏览型号VFC320BP/2K5的Datasheet PDF文件第7页 
ELECTRICAL CHARACTERISTICS  
At TA = +25°C and ±15VDC power supply, unless otherwise noted.  
VFC320BP  
TYP  
VFC320CP  
TYP  
PARAMETER  
CONDITIONS  
MIN  
MAX  
MIN  
MAX  
UNITS  
V/F CONVERTER fOUT = VIN/7.5 R1C1, Figure 4  
INPUT TO OP AMP  
Voltage Range(1)  
Fig. 4 with e2 = 0  
Fig. 4 with e1 = 0  
IIN = VIN/RIN  
>0  
<0  
+0.25  
Note 2  
–10  
+750  
V
V
µA  
Current Range(1)  
Bias Current  
ꢀ
ꢀ
Inverting Input  
4
10  
8
30  
±0.15  
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
nA  
nA  
mV  
µV/°C  
kΩ || pF  
Noninverting Input  
Offset Voltage(3)  
Offset Voltage Drift  
Differential Impedance  
Common-Mode  
Impedance  
±5  
ꢀ
ꢀ
300 || 5 650 || 5  
ꢀ
ꢀ
300 || 3 500 || 3  
ꢀ
kΩ || pF  
ACCURACY  
Linearity Error(1) (4) (5)  
Fig. 4 with e2 = 0(6)  
0.01Hz ≤ fOUT ≤ 10kHz  
0.1Hz ≤ fOUT ≤ 100kHz  
1Hz ≤ fOUT ≤ 1MHz  
±0.004  
±0.008  
±0.1  
±0.005  
±0.030  
±0.0015  
±0.002  
ꢀ
% FSR  
% FSR  
% FSR  
ꢀ
ꢀ
Offset Error Input  
Offset Voltage(3)  
±15  
ꢀ
ppm FSR  
ppm FSR/°C  
% FSR  
ppm FSR/°C  
ppm FSR/°C  
Offset Drift(7)  
±0.5  
±5  
ꢀ
ꢀ
Gain Error(3)  
Gain Drift(7)  
Full Scale Drift  
±10  
50  
50  
ꢀ
20  
20  
f = 10kHz  
f = 10kHz  
(Offset Drift and Gain Drift)(7)(8)(9)  
Power Supply Sensitivity  
±VCC = 14VDC to 18VDC  
CLOAD ≤ 50pF  
±0.015  
ꢀ
ꢀ
% FSR%  
DYNAMIC RESPONSE  
Full Scale Frequency  
Dynamic Range  
1
MHz  
Decades  
6
ꢀ
Settling Time  
(V/F) to Specified Linearity  
For a Full Scale Input Step  
<50% Overload  
Note 10  
Note 10  
ꢀ
ꢀ
Overload Recovery  
OPEN COLLECTOR OUTPUT  
Voltage, Logic “0”  
Leakage Current, Logic “1”  
Voltage, Logic “1”  
I
SINK = 8mA, max  
0.4  
1.0  
ꢀ
ꢀ
V
µA  
V
O = 15V  
0.01  
ꢀ
External Pull-up Resistor  
Required (See Figure 4)  
For Best Linearity  
VPU  
ꢀ
V
%
ns  
Duty Cycle at FS  
Fall Time  
25  
100  
ꢀ
ꢀ
IOUT = 5mA, CLOAD = 500pF  
F/V CONVERTER VOUT = 7.5 R1C1 fIN, Figure 9  
INPUT TO COMPARATOR  
Impedance  
Logic “1”  
Logic “0”  
Pulse-width Range  
50 || 10 150 || 10  
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
kΩ || pF  
+1.0  
–VCC  
0.25  
+VCC  
–0.05  
ꢀ
ꢀ
V
V
µs  
OUTPUT FROM OP AMP  
Voltage  
Current  
Impedance  
Capacitive Load  
I
V
O = 6mA  
O = 7VDC  
Closed-Loop  
Without Oscillation  
0 to +10  
+10  
ꢀ
ꢀ
V
mA  
Ω
0.1  
100  
ꢀ
ꢀ
pF  
POWER SUPPLY  
Rated Voltage  
Voltage Range  
Quiescent Current  
±15  
ꢀ
ꢀ
V
V
mA  
±13  
±20  
±7.5  
ꢀ
ꢀ
ꢀ
ꢀ
±6.5  
TEMPERATURE RANGE  
Specification  
B and C Grades  
S Grade  
–25  
–55  
+85  
+125  
ꢀ
°C  
°C  
Operating  
B and C Grades  
S Grade  
Storage  
–40  
–55  
–65  
+85  
+125  
+150  
ꢀ
ꢀ
ꢀ
ꢀ
°C  
°C  
°C  
ꢀ
Specification the same as for VFC320BP.  
NOTES: (1) A 25% duty cycle at full scale (0.25mA input current) is recommended where possible to achieve best linearity. (2) Determined by RIN and full scale current range  
constraints. (3) Adjustable to zero. See Offset and Gain Adjustment section. (4) Linearity error at any operating frequency is defined as the deviation from a straight line drawn between  
the full scale frequency and 0.1% of full scale frequency. See Discussion of Specifications section. (5) When offset and gain errors are nulled, at an operating temperature, the linearity  
error determines the final accuracy. (6) For e1 = 0 typical linearity errors are: 0.01% at 10kHz, 0.2% at 100kHz, 0.1% at 1MHz. (7) Exclusive of external components’ drift.  
(8) FSR = Full Scale Range (corresponds to full scale and full scale input voltage.) (9) Positive drift is defined to be increasing frequency with increasing temperature.  
(10) One pulse of new frequency plus 50ns typical.  
VFC320  
2
SBVS017A  
1234567...12

下载PDF

与VFC320BP/2K5相关器件

型号 品牌 描述 获取价格 数据表
VFC320BPG4 TI Voltage-to-Frequency and Frequency-to-Voltage Converter 14-PDIP -25 to 85

获取价格
VFC320CG TI Voltage-to-Frequency and Frequency-to-Voltage CONVERTER

获取价格
VFC320CG BB Voltage-to-Frequency and Frequency-to-Voltage CONVERTER

获取价格
VFC320CL-BS BB Voltage to Frequency Converter, Bipolar, CQCC20,

获取价格
VFC320CL-BSS3 BB Voltage to Frequency Converter, Bipolar, CQCC20,

获取价格
VFC320CM BB Voltage-to-Frequency and Frequency-to-Voltage CONVERTER

获取价格

与VFC320BP/2K5相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证