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VESD2-S24-D12-SIP PDF预览

VESD2-S24-D12-SIP

更新时间： 2024-10-03 03:20:15
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Dc-Dc Converter

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VESD2-S24-D12-SIP 数据手册

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VESD2-SIP Series Dc-Dc Converter  
Rev. 01-2006  
Description  
Features  
Designed to convert fixed volt-  
ages into an isolated voltage, the  
VESD2-SIP series is well suited  
for providing board-mount local  
supplies in a wide range of appli-  
cations, including mixed  
·Isolated 2 W output  
·Temperature range: -40°C~+85°C  
·Unregulated  
·High efficiency to 82%  
·Dual voltage output  
·Small footprint  
analog/digital circuits, test &  
measurement equip.,  
process/machine controls, data-  
com/telecom fields, etc...  
·SIP package style  
·Industry standard pinout  
·UL94-V0 package  
·No heatsink required  
·3K Vdc isolation  
The semi-regulated output can be  
followed by 3-terminal regulators  
to provide output protection, in  
addition to output regulation.  
·Power density 1.42 W/cm³  
·No external component required  
·Low cost  
Model  
Input Voltage  
Output  
Voltage  
±5 Vdc  
Output Current  
Package  
Style  
SIP  
Number  
Nominal  
5 Vdc  
Range  
Max.  
±200 mA  
±111 mA  
±83 mA  
±67 mA  
±200 mA  
±111 mA  
±83 mA  
±67 mA  
±200 mA  
±111 mA  
±83 mA  
±67 mA  
Min.  
Efficiency  
82%  
VESD2-S5-D5-SIP  
VESD2-S5-D9-SIP  
VESD2-S5-D12-SIP  
VESD2-S5-D15-SIP  
VESD2-S12-D5-SIP  
VESD2-S12-D9-SIP  
VESD2-S12-D12-SIP  
VESD2-S12-D15-SIP  
VESD2-S24-D5-SIP  
VESD2-S24-D9-SIP  
VESD2-S24-D12-SIP  
VESD2-S24-D15-SIP  
4.5~5.5 Vdc  
±20 mA  
±12 mA  
±9 mA  
±7 mA  
±20 mA  
±12 mA  
±9 mA  
±7 mA  
±20 mA  
±12 mA  
±9 mA  
±7 mA  
5 Vdc  
4.5~5.5 Vdc  
±9 Vdc  
83%  
SIP  
5 Vdc  
4.5~5.5 Vdc  
±12 Vdc  
±15 Vdc  
±5 Vdc  
85%  
SIP  
5 Vdc  
4.5~5.5 Vdc  
85%  
SIP  
12 Vdc  
12 Vdc  
12 Vdc  
12 Vdc  
24 Vdc  
24 Vdc  
24 Vdc  
24 Vdc  
10.8~13.2 Vdc  
10.8~13.2 Vdc  
10.8~13.2 Vdc  
10.8~13.2 Vdc  
21.6~26.4 Vdc  
21.6~26.4 Vdc  
21.6~26.4 Vdc  
21.6~26.4 Vdc  
83%  
SIP  
±9 Vdc  
84%  
SIP  
±12 Vdc  
±15 Vdc  
±5 Vdc  
86%  
SIP  
86%  
SIP  
84%  
SIP  
±9 Vdc  
85%  
SIP  
±12 Vdc  
±15 Vdc  
87%  
SIP  
87%  
SIP  
Output Specifications  
Item  
Test conditions  
Min.  
0.2  
Typ.  
Max.  
Units  
Output power  
2
W
Line Regulation  
Load Regulation  
Output voltage accuracy  
Temperature drift  
Output ripple  
For Vin change of 1%  
10% to 100% full load  
1.2%  
15%  
10%  
See tolerance envelope graph  
@ 100% load  
0.03  
75  
%/°C  
mVp-p  
Hz  
20 MHz Bandwidth  
50  
Switching frequency  
Full load, nominal input  
75K  
Note:  
1. All specifications measured at TA=25°C, humidity <75%, nominal input voltage and rated output load unless  
otherwise specified.  
V-Infinity, LLC, 20050 SW 112th Ave., Tualatin, OR 97062  
www.v-infinity.com  
1-866-372-1258  
123

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VESD2-S24-D12-SIP 替代型号

型号 品牌 替代类型 描述 数据表
PEM2-S24-D12-S CUI

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