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V320MTCX PDF预览

V320MTCX

更新时间: 2024-11-22 23:41:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线收发器
页数 文件大小 规格书
10页 501K
描述
Single 8-bit Bus Transceiver

V320MTCX 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP24,.25
针数:24Reach Compliance Code:unknown
风险等级:5.84控制类型:COMMON CONTROL
计数方向:BIDIRECTIONAL系列:BICMOS
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:7.8 mm逻辑集成电路类型:BUS TRANSCEIVER
最大I(ol):0.064 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP24,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):30 mAProp。Delay @ Nom-Sup:4.8 ns
传播延迟(tpd):17 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:POSITIVE EDGE宽度:4.4 mm

V320MTCX 数据手册

 浏览型号V320MTCX的Datasheet PDF文件第2页浏览型号V320MTCX的Datasheet PDF文件第3页浏览型号V320MTCX的Datasheet PDF文件第4页浏览型号V320MTCX的Datasheet PDF文件第5页浏览型号V320MTCX的Datasheet PDF文件第6页浏览型号V320MTCX的Datasheet PDF文件第7页 
April 1998  
Revised October 1998  
V320  
8-Bit Registered Bus Transceiver  
General Description  
The V320 is an 8-bit universal bus transceiver designed for  
high speed interfacing with the VME320 backplane. It has  
output characteristics optimized for driving large capacitive  
Features  
Independent registers for A and B buses  
Multiplexed real-time and stored data  
Guaranteed output skew  
loads and features modified input levels (VIH/VIL  
) for  
Guaranteed MOS (Multiple Output Switching) Specifica-  
increased noise immunity and reduced input skew. The  
V320 functionality consists of bus transceiver circuits with  
3-STATE, D-type flip-flops, and control circuitry arranged  
for multiplexed transmission of data directly from the input  
bus or from the internal registers. Data on the A or B bus  
will be clocked into the registers as the appropriate clock  
pin goes to a high logic level. OE and direction pins are  
provided to control the transceiver function. In the trans-  
ceiver mode, data present at the high impedance port may  
be stored in either the A or B register or in both. The select  
controls can multiplex stored and real time (transparent  
mode) data. The direction control determines which bus  
will receive data when the enable control OE is active  
LOW. In the isolation mode (OE HIGH) A data may be  
stored in the B register and/or B data may be stored in the  
A register.  
tions  
Output switching specified for both 50 pF and 250 pF,  
and 500 pF loads  
Guaranteed simultaneous switching noise level (VOLP  
VOLV) and dynamic threshold performance (VIHD/VILD  
/
)
Glitch free power up/down high impedance for live inser-  
tion  
BiCMOS technology for high drive and low power dissi-  
pation  
40°C to 85°C commercial temperature and VCC specifi-  
cations  
Modified specifications across VCC and temperature  
(VCC = 5.0V ±1%, T = 25°C ± 20°C) present more realis-  
tic system conditions  
Available in TSSOP (MTC)  
Ordering Code:  
Order Number  
Package Number  
Package Description  
V320MTC  
MTC24  
24-Lead Thin Shrink Small Outline Package, JEDEC MO-153, 4.4mm Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
D
Direction A-to-B (High) B-to A (Low)  
Output Enable (Active LOW)  
OE  
CLKAB/SELAB A-to-B Clock/Select  
CLKBA/SELBA B-to-A Clock/Select  
A0–7  
B0–7  
A Inputs/Outputs (TTL)  
B Inputs/Outputs (TTL)  
© 1998 Fairchild Semiconductor Corporation  
DS500149.prf  
www.fairchildsemi.com  

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