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V3021XSO8A PDF预览

V3021XSO8A

更新时间: 2024-11-20 03:13:47
品牌 Logo 应用领域
EMMICRO /
页数 文件大小 规格书
15页 681K
描述
Ultra Low Power 1-Bit 32 kHz RTC

V3021XSO8A 数据手册

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R
EM MICROELECTRONIC - MARIN SA  
V3021  
Ultra Low Power 1-Bit 32 kHz RTC  
Description  
Features  
The V3021 is a low power CMOS real time clock. Data is  
transmitted serially as 4 address bits and 8 data bits, over  
one line of a standard parallel data bus. The device is  
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Supply current typically 800 nA at 3V  
50 ns access time with 50 pF load capacitance  
Fully operational from 2.0V to 5.5V  
accessed by chip select ( CS ) with read and write control  
timing provided by either RD and WR pulse (Intel CPU)  
No busy states or danger of a clock update while  
accessing  
or DS with advanced R/  
W (Motorola CPU). Data can  
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Serial communication on one line of a standard  
parallel data bus or over a conventional 3 wire serial  
interface  
also be transmitted over a conventional 3 wire serial  
interface having CLK, data I/O and strobe. The V3021  
has no busy states and there is no danger of a clock  
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Interface compatible with both Intel and Motorola  
update while accessing.  
Supply current is typically  
Seconds, minutes, hours, day of month, month, year,  
week day and week number in BCD format  
800 nA at VDD = 3.0V. Battery operation is supported by  
complete functionality down to 2.0V. The oscillator is  
typically 0.3 ppm/V.  
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Leap year and week number correction  
Time set lock mode to prevent unauthorized setting of  
the current time or date  
Applications  
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Oscillator stability 0.3 ppm / volt  
No external capacitor needed  
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Utility meters  
Battery operated and portable equipment  
Consumer electronics  
White/brown goods  
Pay phones  
Frequency measurement and test modes  
Temperature range: -40°C to +85°C  
On request extended temperature range, -40°C to  
+125°C  
Cash registers  
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Packages DIP8 and SO8  
Personal computers  
Programmable controller systems  
Data loggers  
Automotive systems  
Typical Operating Configuration  
Pin Assignment  
CPU  
SO8  
VDD  
XI  
XO  
CS  
WR  
RD  
I/O  
Address  
Decoder  
V3021  
VSS  
CS  
RD  
XI  
V3021  
WR  
I/O  
XO  
Fig. 2  
CS  
RD  
WR  
RAM  
Fig. 1  
Copyright © 2005, EM Microelectronic-Marin SA  
1
www.emmicroelectronic.com  

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