USB97C210
USB 2.0 Flash Media
Controller
Datasheet
Product Features
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Complete USB Specification 2.0 Compatibility
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8051 8 bit microprocessor
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Includes USB 2.0 Transceiver
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Provides low speed control functions
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A Bi-directional Control and a Bi-directional Bulk
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30 Mhz execution speed at 4 cycles per instruction
Endpoint are provided.
average
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12K Bytes of internal SRAM for general purpose
scratchpad
768 Bytes of internal SRAM for general purpose
scratchpad or program execution while re-flashing
external ROM
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Complete System Solution for interfacing
CompactFlashTM (CF), SmartMediaTM (SM),
Memory StickTM (MS), and Secure Digital (SD)
and MultiMediaCardTM (MMC) devices to USB 2.0
bus*
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Double Buffered Bulk Endpoint
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Supports USB Bulk Only Mass Storage Compliant
Bootable BIOS
Bi-directional 512 Byte Buffer for Bulk Endpoint
64 Byte RX Control Endpoint Buffer
64 Byte TX Control Endpoint Buffer
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Support for the following devices:
CompactFlash
SmartMedia
External Program Memory Interface
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XD Card
64K Byte Code Space
Flash, SRAM, or EPROM Memory
Memory Stick, Memory Stick Pro, HS Memory
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Stick
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On Board 12Mhz Crystal Driver Circuit
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Secure Digital
MultiMediaCard
Internal PLL for 480Mhz USB2.0 Sampling,
30Mhz MCU clock
NAND Flash drive
CF form factor ATA hard drives
Support for simultaneous operation of all above
devices. (only one at a time of each of the
following groups supported: CF or ATA drive, SM
or XD or NAND, SD or MMC)
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Supports firmware upgrade via USB bus if “boot
block” Flash program memory is used
2.5 Volt, Low Power Core Operation
3.3 Volt I/O with 5V input tolerance
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Enhanced CF support to allow true sequential read
128 Pin TQFP (1.0 mm height package) or QFP
operations to improve throughput
Package
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16 GPIOs for special function use: LED
indicators, button inputs, power control to
memory devices, etc.
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Inputs capable of generating interrupts with either
edge sensitivity
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One GPIO has automatic 1 sec toggle capability
for flashing an LED indicator.
SMSC USB97C210
Page 1
Revision 1.5 (11-05-03)
DATASHEET