Datasheet > UPSD3353A-40U1

UPSD3353A-40U1

更新时间： 2024-11-15 23:03:55

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		闪存微控制器
页数	文件大小	规格书
8页	72K
描述
Flash Programmable System Device with 8032 Microcontroller Core

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数据手册

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UPSD3353A-40U1 数据手册

µPSD3200 FAMILY

Flash Programmable System Device

with 8032 Microcontroller Core

DATA BRIEFING

FEATURES SUMMARY

■ The µPSD3200 Family combines a Flash PSD

Figure 1. Packages

architecture with an 8032 microcontroller core

The µPSD3200 Family of Flash PSDs features

dual banks of Flash memory, SRAM, general

purpose I/O and programmable logic, supervi-

sory functions and access via USB, I C, ADC,

DDC and PWM channels, and an on-board

8032 microcontroller core, with two UARTs,

three 16-bit Timer/Counters and one External

Interrupt. As with other Flash PSD families, the

µPSD3200 Family is also in-system program-

mable (ISP) via a JTAG ISP interface.

■ Large 8 KByte SRAM with battery back-up

option

■ Dual bank Flash memories

TQFP52 (T)

– 128 KByte or 256 KByte main Flash memory

– 32 KByte secondary Flash memory

■ Content Security

– Block access to Flash memory

■ Programmable Decode PLD for flexibleaddress

mapping of all memories.

■ High-speed clock standard 8032 core (12-cycle)

■ USB Interface (µPSD3234A-40U6 only)

■ I C interface for peripheral connections

TQFP80 (U)

■ Five Pulse Width Modulator (PWM) channels

■ Standalone Display Data Channel (DDC)

■ Six I/O ports with up to 50 I/O pins

■ 3000 gate PLD with 16 macrocells

■ Supervisor functions

■ In-System Programming (ISP) via JTAG

■ Zero-Power Technology

■ Single Supply Voltage

– 4.5 to 5.5 V

– 3.0 to 3.6 V

June 2002

1/8

Complete data available on Data-on-Disc CD-ROM or at www.st.com.

12 3 4 5 6 7 8

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