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UPD75P0076CU-A PDF预览

UPD75P0076CU-A

更新时间: 2024-11-21 13:15:15
品牌 Logo 应用领域
日电电子 - NEC 微控制器
页数 文件大小 规格书
62页 405K
描述
Microcontroller, 4-Bit, OTPROM, MOS, PDIP42, LEAD FREE, 0.600 INCH, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-42

UPD75P0076CU-A 技术参数

是否Rohs认证:符合生命周期:Transferred
包装说明:LEAD FREE, 0.600 INCH, 1.778 MM PITCH, SHRINK, PLASTIC, DIP-42Reach Compliance Code:compliant
风险等级:5.77Is Samacsys:N
具有ADC:YES地址总线宽度:
位大小:4最大时钟频率:6 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:JESD-30 代码:R-PDIP-T42
JESD-609代码:e6/e4I/O 线路数量:32
端子数量:42最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:NO
封装主体材料:PLASTIC/EPOXY封装代码:SDIP
封装形状:RECTANGULAR封装形式:IN-LINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
ROM可编程性:OTPROM座面最大高度:5.08 mm
最大供电电压:5.5 V最小供电电压:1.8 V
表面贴装:NO技术:MOS
温度等级:INDUSTRIAL端子面层:TIN BISMUTH/NICKEL PALLADIUM GOLD
端子形式:THROUGH-HOLE端子节距:1.778 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:15.24 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

UPD75P0076CU-A 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD75P0076  
4-BIT SINGLE-CHIP MICROCONTROLLER  
The µPD75P0076 replaces the µPD750068’s internal mask ROM with a one-time PROM and features expanded ROM  
capacity.  
Because the µPD75P0076 supports programming by users, it is suitable for use in prototype testing for system  
development using the µPD750064, 750066, and 750068 products, and for use in small-lot production.  
Detailed information about function is provided in the following user’s manual.  
Be sure to read it before designing:  
µPD750068 User’s Manual: U10670E  
FEATURES  
Compatible with µPD750068  
Memory capacity:  
• PROM : 16384 x 8 bits  
• RAM : 512 x 4 bits  
Can operate with same power supply voltage as the mask ROM version µPD750068  
VDD = 1.8 to 5.5 V  
On-chip A/D converter capable of low-voltage operation (AVREF = 1.8 to 5.5 V)  
8-bit resolution x 8 channels  
Small shrink SOP package  
ORDERING INFORMATION  
Part Number  
µPD75P0076CU  
µPD75P0076GT  
Package  
42-pin plastic shrink DIP (600 mil, 1.778-mm pitch)  
42-pin plastic shrink SOP (375 mil, 0.8-mm pitch)  
Caution On-chip pull-up resistors by mask option cannot be provided.  
The inform ation in this docum ent is subject to change w ithout notice.  
Document No. U10232EJ1V0DS00 (1st edition)  
Date Published December 1996 N  
Printed in Japan  
The m ark  
show s m ajor revised points.  
1995  
©

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