Datasheet > UPD72893

UPD72893

更新时间： 2024-01-17 05:29:12

品牌	Logo	应用领域
其他 - ETC		控制器
页数	文件大小	规格书
2页	71K
描述
Controller Miscellaneous - Datasheet Reference

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中文翻译

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数据手册

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UPD72893 数据手册

µ PD72891,72893

IEEE1394 Link Layer Controller with DV Codec

Description

The µPD72891 and 72893 are a IEEE1394 link layer controllers developed for digital AV systems and feature an on-

chip 32-bit RISC CPU (V850E) for IEEE1394 processing.

These link layer controllers have two stream interface channels to transmit/receive image data conforming to the

IEC61883 Standard, such as MPEG and DV, and these channels can be independently used for transmission and

reception. In addition, a total of 8 Kbytes of FIFO buffer space is provided to transmit/receive isochronous signals. This

buffer space can be allocated as transmit and receive FIFO buffers in 2 Kbytes units.

The µPD72891 and 72893 support IEEE1394 bus control and AV/C commands via the on-chip CPU, as well as

external control using either a serial or a parallel interface.

Features

• All functions required for Digital AV 1394 interface are

equipped in a single-chip

• Compliant to IEEE1394-1995 and IEEE1394a-2000

• Supports 400 Mbps, 200 Mbps, 100 Mbps speed

• 3.3 V/2.5 V power supply

• On chip 32-bit RISC CPU

• Package : 208-pin QFP

• Copy Protection circuit equipped (the µPD72891 only)

• Full duplex MPEG/DV transmission supported

• On-chip IEC61883 function

Block Diagram of the µPD72891

MPEG

TS I/F

(8 bits)

IEC61883

MPEG2

Decoder

I/F

Copy

PHY

27 MHz

TS_CLK

Protection

Link

I/F

Link Core

Async I/F

PHY

REC656

(8 bits)

IEC61883

CSR

I/F

Copy

MPEG2

Encoder

Protection

Async Async

Tx FIFO Rx FIFO

2 KB 2 KB

PCM

Serial I/F

Link I/F

VCLKI/MCK44/MCK48

VCLKO/MCKO

Bus Controller

Decoder

Encoder

16M

SDRAM

CPU

SIO,

Port,

NB85E

HOST

I/F

CPU

I/F

ROM:192 KB

RAM: 60 KB

Timer…

(68k / ISA)

System controller can

select either.

UART I/F

Application and Companion Chip

• Application

• Companion Chip

• Set-top Box

• Digital VHS, DVD-RW, AV HDD

• Digital Television

• µPD72852 : 2-port low power PHY compliant with

IEEE1394a-2000

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. S15787EJ1V0PF00 (1st edition)

Date Published October 2001 NS CP(K)

Printed in Japan

2001

中文翻译

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