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UPD464318ALS1-A44 PDF预览

UPD464318ALS1-A44

更新时间: 2024-09-24 23:40:19
品牌 Logo 应用领域
其他 - ETC 静态存储器
页数 文件大小 规格书
28页 200K
描述
x18 Fast Synchronous SRAM

UPD464318ALS1-A44 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µ
PD464318AL, 464336AL  
4M-BIT Bi-CMOS SYNCHRONOUS FAST STATIC RAM  
256K-WORD BY 18-BIT / 128K-WORD BY 36-BIT  
HSTL INTERFACE / REGISTER-REGISTER / LATE WRITE  
Description  
The µPD464318AL is a 262,144 words by 18 bits, and the µPD464336AL is a 131,072 words by 36 bits  
synchronous static RAM fabricated with advanced Bi-CMOS technology using N-channel memory cell.  
This technology and unique peripheral circuits make the µPD464318AL and µPD464336AL a high-speed device.  
The µPD464318AL and µPD464336AL are suitable for applications which require high-speed, low voltage, high-  
density memory and wide bit configuration, such as cache and buffer memory.  
These are packaged in a 119-pin plastic BGA (Ball Grid Array).  
Features  
Fully synchronous operation  
HSTL Input / Output levels  
Fast clock access time : 2.0 ns / 250 MHz, 2.3 ns / 225 MHz, 2.5 ns / 200 MHz  
Asynchronous output enable control : /G  
Byte write control : /SBa (DQa1-9), /SBb (DQb1-9), /SBc (DQc1-9), /SBd (DQd1-9)  
Common I/O using three-state outputs  
Internally self-timed write cycle  
Late write with 1 dead cycle between Read-Write  
User-configurable outputs :  
Controlled impedance outputs or push-pull outputs  
Boundary scan (JTAG) IEEE 1149.1 compatible  
3.3 V (Chip) / 1.5V (I/O) supply  
119 bump BGA package, 1.27 mm pitch, 14 mm x 22 mm  
Sleep mode : ZZ(Enables sleep mode, active high)  
Ordering Information  
Part number  
µPD464318ALS1-A4  
µPD464318ALS1-A44  
µPD464318ALS1-A5  
µPD464336ALS1-A4  
µPD464336ALS1-A44  
µPD464336ALS1-A5  
Access time  
2.0 ns  
Clock frequency  
250 MHz  
Package  
119-pin plastic BGA  
2.3 ns  
225 MHz  
2.5 ns  
200 MHz  
2.0 ns  
250 MHz  
2.3 ns  
225 MHz  
2.5 ns  
200 MHz  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
The mark shows major revised points.  
Document No. M13508EJ2V0DSJ1 (2nd edition)  
Date Published December 2000 NS CP(K)  
Printed in Japan  
1999  
©

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