Datasheet > UP8815PDDA

UP8815PDDA

更新时间： 2024-01-04 23:19:03

品牌	Logo	应用领域
力智 - UPI		双倍数据速率
页数	文件大小	规格书
10页	121K
描述
3A Ultra Low Dropout Linear Regulator DDR4 Memory VTT Termination

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数据手册

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UP8815PDDA 数据手册

uP8815

3A Ultra Low Dropout Linear Regulator for

DDR4 Memory VTT Termination

Features

General Description

VIN Input Voltage Range: 1V to 3.6V

VCNTL Input Voltage: 2.9V to 5.5V

The uP8815 is an ultra low dropout regulator for Double

Date Rate (DDR) termination system. It is specifically

designed for low input voltage and low external component

count systems. The uP8815 is capable of sinking/sourcing

up to 3A output current, providing fast load transient and

only requires a minimum 3x10uF ceramic output capacitor.

The uP8815 supports a remote sensing function and all

power requirements forDDR VTT bus termination, DDR4

especially. Other features include an ENsignal that can be

used to discharge VTT, thermal protection, bi-directional

current limit protection. The uP8815 is available in a

WDFN3x3-10L package.

Power Good to Monitor Output Regulation

10mA Source/Sink Buffer Reference

Output Voltage Remote Sense

Low External Component

Discharge MOSFETs at VOUT Shutdown

Enable Control

Up to 3A Source/Sink Current

Support DDR3 and Low Power DDR3/DDR4

Stable with Pure MLCC as Output Cap

RoHS Compliant and Halogen Free

Ordering Information

Applications

Order Number

uP8815PDDA

Package

Top Marking

uP8815P

WDFN3x3-10L

DDR Memory Termination

Desktop PCs, Notebook Computers, and Server

Note:

(1) Please check the sample/production availability with

uPI representatives.

(2) uPI products are compatible with the current IPC/JEDEC

J-STD-020 requirement. They are halogen-free, RoHS com-

pliant and 100% matte tin (Sn) plating that are suitable for

use in SnPb or Pb-free soldering processes.

Pin Configuration

10 VCNTL

REFIN

VIN

PGOOD

GND

VOUT

PGND

VSENSE

REFOUT

DFN3x3-10L

uP8815-DS-F00A0, Apr. 2018

www.upi-semi.com

12 3 4 5 6 7...10

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