uP7706
Application Information
The uP7706 is a high performance linear regulator This allows for the device being some distance from any
specifically designed to deliver up to 3A output current with bulk capacitance on the rail.Additionally, bulk capacitance
very low input voltage and ultra low dropout voltage. With may be added closely to the input supply pin of the uP7706
dual-supply configuration, the uP7706 operates with a wide to ensure that VIN does not sag, improving load transient
input voltage VIN range from 1.0V to 5.5V and is ideal for response.
applications where VOUT is very close to VIN .
Output capacitor: A minimum bulk capacitance of 33uF,
Supply Voltage for Control Circuit VCNTL
along with a 0.1uF ceramic decoupling capacitor is
recommended. Increasing the bulk capacitance will improve
the overall transient response. The use of multiple lower
value ceramic capacitors in parallel to achieve the desired
bulk capacitance will not cause stability issues. Although
designed for use with ceramic output capacitors, the uP7706
is extremely tolerant of output capacitor ESR values and
thus will also work comfortably with tantalum output
capacitors.
Unlike other linear regulators that use a P-Channel
MOSFET as the pass transistor, the uP7706 uses an N-
Channel as the pass transistor. N-Channel MOSFET
provides lower on-resistance and better stability meeting
stringent requirements of current generation
microprocessors and other sensitive electronic devices.
The drain ofN-Channel MOSFET is connected to VINand
the source is connected to VOUT. This requires that the
supply voltage VCNTL for control circuit is at least 1.5V higher Thermal Consideration
than the output voltage to provide enough overdrive capability
for the pass transistor thus to achieve low dropout and fast
transient response. It is highly recommended to bias the
device with 5V voltage source if available.
The uP7706 integrates internal thermal limiting function to
protect the device from damage during fault conditions.
However, continuously keeping the junction near the thermal
shutdown temperature may remain possibility to affect
Use a minimum 0.1uF ceramic capacitor plus a 10Ω device reliability. It is highly recommended to keep the
resistor to locally bypass the control voltage.
Input/Output Capacitor Selection
The uP7706 has a fast transient response that allows it to
handle large load changes associated with high current PD = (VIN - VOUT) x IOUT + VCNTL x ICNTL
applications. Proper selection of the of the output capacitor
and it’s ESR value determines stable operation and
optimizes performance. The typical application circuit
shown in Figure 1 was tested with a wide range of different
capacitors. The circuit was found to be unconditionally
stable with capacitor values from 10ìF to 2200ìF and ESR
ranging from 0.5mΩ to greater then 75mΩ.
junction temperature below the recommended operation
condition 125OC for maximum reliability.
Power dissipation in the device is calculated as:
It is adequate to neglect power loss with respective to
control circuit VCNTL x ICNTL when considering thermal
management in uP7706 Take the following moderate
operation condition as an example: VIN = 2.5V, VOUT = 1.5V,
I
OUT = 2A, the power dissipation is:
PD = (1.8V- 1.2V) x 2A = 2.0W
This power dissipation is conducted through the package
into the ambient environment, and, in the process, the
temperature of the die (TJ) rises above ambient. Large power
dissipation may cause considerable temperature raise in
the regulator in large dropout applications. The geometry
of the package and of the printed circuit board (PCB) greatly
influence how quickly the heat is transferred to the PCB
and away from the chip. The most commonly used thermal
metrics for IC packages are thermal resistance from the
chip junction to the ambient air surrounding the package
(θJA):
5VCC
CNTL
4
C1
0.1uF
EN
POK
VOUT
FB
2
1
6
7
R3
10K
VOUT
VIN
VIN
3
R2
C2
C4
12.5K
22uF
option
C3
100uF
R1
10K
8
GND
θJA = ( TJ -TA ) / PD
θJA specified in the Thermal Information section is measured
in the natural convection at TA = 25OC on a high effective
thermal conductivity test board (4 Layers, 2S2P) of JEDEC
51-7 thermal measurement standard. The case point of
Figure 1. TypicalApplication Circuit
Input capacitor:Aminimum of 10uF ceramic capacitor is
recommended to be placed directly next to the VIN pin.
uPI Semiconductor Corp., http://www.upi-semi.com
Rev. F00, File Name: uP7706-DS-F0000
9
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