UCC2921D

更新时间： 2024-02-12 09:45:10

品牌	Logo	应用领域
德州仪器 - TI		电源电路电源管理电路光电二极管信息通信管理
页数	文件大小	规格书
16页	1108K
描述
Latchable Negative Floating Hot Swap Power Manager

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技术参数
数据手册

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UCC2921D 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	CERAMIC, DIP-8
针数：	8	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.16	Is Samacsys：	N
可调阈值：	NO	模拟集成电路 - 其他类型：	POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 代码：	R-GDIP-T8	信道数量：	1
功能数量：	1	端子数量：	8
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	CERAMIC, GLASS-SEALED	封装代码：	DIP
封装等效代码：	DIP8,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified	座面最大高度：	5.08 mm
子类别：	Power Management Circuits	最大供电电流 (Isup)：	2 mA
最大供电电压 (Vsup)：	10 V	最小供电电压 (Vsup)：	9 V
标称供电电压 (Vsup)：	9.5 V	表面贴装：	NO
技术：	BICMOS	温度等级：	INDUSTRIAL
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.62 mm	Base Number Matches：	1

UCC2921D 数据手册

UCC1921

UCC2921

UCC3921

Latchable Negative Floating Hot Swap Power Manager

FEATURES

DESCRIPTION

• Precision Fault Threshold

The UCC3921 family of negative floating hot swap power managers pro-

vides complete power management, hot swap, and fault handling capa-

bility. The IC is referenced to the negative input voltage and is powered

through an external resistor connected to ground, which is essentially a

current drive as opposed to the traditional voltage drive. The onboard

10V shunt regulator protects the IC from excess voltage and serves as a

reference for programming the maximum allowable output sourcing cur-

rent during a fault. All control and housekeeping functions are integrated

and externally programmable. These include the fault current level, maxi-

mum output sourcing current, maximum fault time, selection of Retry or

Latched mode, soft start time, and average power limiting. In the event of

a constant fault, the internal timer will limit the on time from less than

0.1% to a maximum of 3% duty cycle. The duty cycle modulation de-

pends on the current into PL, which is a function of the voltage across

the FET, thus limiting average power dissipation in the FET. The fault

level is fixed at 50mV across the current sense amplifier to minimize total

• Programmable:

Average Power Limiting, Linear

Current Control, Overcurrent Limit

and Fault Time

• Fault Output Indication Signal

• Automatic Retry Mode or Latched

Operation Mode

• Shutdown Control

• Undervoltage Lockout

• 250µs Glitch Filter on the SDFLTCH

• 8-Pin DIL and SOIC

(continued)

BLOCK DIAGRAM

UDG-99052

3/98

12 3 4 5 6 7...16

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