UCC27524A
www.ti.com
SLUSBP4A –AUGUST 2013
Dual 5-A, High-Speed, Low-Side Gate Driver
with Negative Input Voltage Capability
Check for Samples: UCC27524A
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FEATURES
APPLICATIONS
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Industry-Standard Pin Out
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Switch-Mode Power Supplies
Two Independent Gate-Drive Channels
5-A Peak Source and Sink-Drive Current
Independent-Enable Function for Each Output
DC-to-DC Converters
Motor Control, Solar Power
Gate Drive for Emerging Wide Band-Gap
Power Devices such as GaN
TTL and CMOS Compatible Logic Threshold
Independent of Supply Voltage
DESCRIPTION
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Hysteretic-Logic Thresholds for High Noise
Immunity
The UCC27524A device is a dual-channel, high-
speed, low-side, gate-driver device capable of
effectively driving MOSFET and IGBT power
switches. The UCC27524A is a variant of the
UCC2752x family. The UCC27524A adds the ability
to handle -5 V directly at the input pins for increased
robustness. The UCC27524A is a dual non-inverting
driver. Using a design that inherently minimizes
shoot-through current, the UCC27524A is capable of
delivering high-peak current pulses of up to 5-A
source and 5-A sink into capacitive loads along with
rail-to-rail drive capability and extremely small
propagation delay typically 13 ns. In addition, the
drivers feature matched internal propagation delays
between the two channels which are very well suited
for applications requiring dual-gate drives with critical
timing, such as synchronous rectifiers. This also
enables connecting two channels in parallel to
effectively increase current-drive capability or driving
two switches in parallel with a single input signal. The
input pin thresholds are based on TTL and CMOS
compatible low-voltage logic, which is fixed and
independent of the VDD supply voltage. Wide
hysteresis between the high and low thresholds offers
excellent noise immunity.
Ability to Handle Negative Voltages (-5 V) at
Inputs
Inputs and Enable Pin-Voltage Levels Not
Restricted by VDD Pin Bias Supply Voltage
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4.5 to 18-V Single-Supply Range
Outputs Held Low During VDD-UVLO, (ensures
glitch-free operation at power-up and power-
down)
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Fast Propagation Delays (13-ns typical)
Fast Rise and Fall Times (7-ns and 6-ns
typical)
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1-ns Typical Delay Matching Between 2-
Channels
Two Outputs are Paralleled for Higher Drive
Current
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Outputs Held in LOW When Inputs Floating
SOIC-8, MSOP-8 PowerPAD™ Package
Options
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Operating Temperature Range of –40°C to
140°C
PRODUCT MATRIX
Dual Non-Inverting Inputs
UCC27524A
ENA
INA
1
2
3
4
8
7
6
5
ENB
OUTA
VDD
GND
INB
OUTB
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated