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UC62WV0256EI-70 PDF预览

UC62WV0256EI-70

更新时间: 2024-11-28 21:55:39
品牌 Logo 应用领域
其他 - ETC 静态存储器
页数 文件大小 规格书
10页 425K
描述
Low Power CMOS SRAM 32K X8 Bits

UC62WV0256EI-70 数据手册

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Low Power CMOS SRAM  
32K X8 Bits  
UC62WV0256  
-35/-55/-70  
Features:  
• Vcc operation voltage : 2.0V ~ 5.6V  
• Low power consumption :  
15mA (Max.) operating current  
2uA (Typ.) CMOS standby current  
• High Speed Access time :  
Description  
The UC62WV0256 is a high performance, very low  
power CMOS Static Random Access Memory organized as  
32,768 words by 8 bits and operates from a wide range of  
2.7V to 5.6V supply voltage. Advanced CMOS technology  
and circuit techniques provide both high speed and low  
power features with a typical CMOS standby current of 1uA  
and maximum access time of 70ns in 2.0V operation.  
Easy memory expansion is provided enable (CE), and  
active LOW output enable (OE) and three-state output  
drivers.  
35ns (Max) at Vcc = 2.7V  
55ns (Max) at Vcc = 2.7V  
70ns (Max.) at Vcc= 2.0V  
• Automatic power down when chip is deselected  
• Three state outputs and TTL compatible  
• Data retention supply voltage as low as 1.2V  
• Easy expansion with CE\ and OE\ options  
The UC62WV0256 has an automatic power down  
feature, reducing the power consumption significantly when  
chip is deselected.  
The UC62WV0256 is available in the JEDEC standard 28 pin  
330mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP  
and 8mmx13.4mm TSOP (normal type).  
PRODUCT FAMILY  
Power Consumption  
Speed  
(ns)  
Operating  
Temperature  
Package  
Type  
VCC=5.6V  
Product Family  
Vcc Range  
STANDBY  
Vcc=5.0V  
Operating(Max)  
Vcc=2.7V  
35ns  
55ns  
70ns  
UC62WV0256BC  
UC62WV0256CC  
UC62WV0256DC  
UC62WV0256EC  
UC62WV0256AC  
UC62WV0256BI  
UC62WV0256CI  
UC62WV0256DI  
UC62WV0256EI  
UC62WV0256AI  
SOP-28  
TSOP-28  
PDIP-28  
SOJ-28  
DICE  
0~ 70℃  
2.0V ~ 5.6V  
35/55/70  
4uA  
25mA  
25mA  
18mA  
15mA  
15mA  
SOP-28  
TSOP-28  
PDIP-28  
SOJ-28  
DICE  
-25~ 85  
2.0V ~ 5.6V  
35/55/70  
4uA  
18mA  
PIN CONFIGURATIONS  
BLOCK DIAGRAM  
A14  
A12  
A7  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
VCC  
WE  
A13  
A8  
2
3
UC62WV0256BI  
UC62WV0256DI  
UC62WV0256EI  
UC62WV0256BC  
UC62WV0256DC  
UC62WV0256EC  
ROW  
Address  
A6  
4
MEMORY ARRAY  
32K X 8 Bits  
A5  
5
A9  
A4  
6
A11  
OE  
COL  
Address  
A3  
7
A2  
8
A10  
CE  
COLUMN DECODER  
A1  
9
SENSE AMPLIFIER  
&
WRITE DRIVER  
A0  
10  
11  
12  
13  
14  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
CE  
WE  
OE  
DQ0  
DQ1  
DQ2  
GND  
CE  
X8  
WE  
I/O BUFFER  
OE  
OE  
A11  
A9  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
A10  
CE  
2
3
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
GND  
DQ2  
DQ1  
DQ0  
A0  
A8  
4
A13  
WE  
VCC  
A14  
A12  
A7  
5
6
7
UC62WV0256CC  
UC62WV0256CI  
8
9
10  
11  
12  
13  
14  
A6  
A5  
A4  
A1  
A3  
A2  
U-Chip Technology Corp. LTD.  
Reserves the right to modify document contents without notice.  
Revision 2.0  
PAGE 1  

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