Datasheet > UC3844A

UC3844A

更新时间： 2024-11-23 04:48:15

品牌	Logo	应用领域
戈采 - FCI		控制器
页数	文件大小	规格书
6页	254K
描述
High Performance Current Mode Controller

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UC3844A 数据手册

UC3844A High Performance

Current Mode Controller

The UC3844A series of high performance

a latch for single pulse metering, and a flip-flop which

blanks the output off every other oscillator cycle,

allowing output deadtimes to be programmed for 50%

to 70%.

This device is available in an 8–pin dual–in–

line plastic package as well as the 14–pin plastic sur-

face mount (SOP–14). The SOP–14 package has sepa-

rate power and ground pins for the totem pole output

stage.

fixed frequency current mode controllers are

specifically designed for off–line and dc–to–dc

converter applications offering the designer a cost

effective solution with minimal external components.

This integrated circuit features an oscillator, a

temperature compensated reference, high gain error

amplifier, current sensing comparator, and a high

current totem pole output ideally suited for driving a

power MOSFET.

The UC3844A has UVLO thresholds of

16V (on) and 10V (off), Ideally suited for off-line

converters.

Also included are protective features

consisting of input and reference undervoltage lockouts

each with hysteresis, cycle–by–cycle current limiting,

Output Deadtime Adjustable from 50% to 70%

Current Mode Operation to 500 kHz

Automatic Feed Forward Compensation

Latching PWM for Cycle–By–Cycle Current Limiting

Internally Trimmed Reference with Undervoltage Lockout

High Current Totem Pole Output

CDSUFFIX

PLASTIC PACKAGE

8 DIP

D8SUFFIX

PLASTIC PACKAGE

8 SOP

Undervoltage Lockout with Hysteresis

Low Startup and Operating Current

CSSUFFIX

PLASTIC PACKAGE

SOP-14

SIMPLIFIEDBLOCKDIAGRAM

PINCONNECTIONS

Pin numbers adjacent to terminals are for the D suffix 8-DIP package.

Pin numbers in parenthesis are for the S suffix SOP–14 package.

NOTES: 1. Maximum Package power dissipation limits must be observed.

2. Adjust V_CCabove the Startup threshold before setting to 15 V.

3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible

T_low= 0°C, T_high= +70°C.

4. This parameter is measured at the latch trip point with V_FB= 0V.

∆V Output Compensation

∆V Current Sense Input

5. Comparator gain is defined as: A_V

4-24

12 3 4 5 6

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