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UC2842A

更新时间: 2024-11-20 22:41:51
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 控制器
页数 文件大小 规格书
16页 172K
描述
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER

UC2842A 数据手册

 浏览型号UC2842A的Datasheet PDF文件第2页浏览型号UC2842A的Datasheet PDF文件第3页浏览型号UC2842A的Datasheet PDF文件第4页浏览型号UC2842A的Datasheet PDF文件第5页浏览型号UC2842A的Datasheet PDF文件第6页浏览型号UC2842A的Datasheet PDF文件第7页 
UC284XA  
UC384XA  
HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER  
NOT FOR NEW DESIGN  
1
FEATURES  
Figure 1. Package  
TRIMMED OSCILLATOR DISCHARGE  
CURRENT  
CURRENT MODE OPERATION TO 500kHz  
AUTOMATIC FEED FORWARD  
COMPENSATION  
DIP-8  
SO-8  
LATCHING PWM FOR CYCLE-BY-CYCLE  
CURRENT LIMITING  
INTERNALLY TRIMMED REFERENCE WITH  
UNDERVOLTAGE LOCKOUT  
HIGH CURRENT TOTEM POLE OUTPUT  
UNDERVOLTAGE LOCKOUT WITH  
HYSTERESIS  
LOW START-UP CURRENT (< 0.5mA)  
DOUBLE PULSE SUPPRESSION  
Table 1. Order Codes  
Part Number  
Package  
UC2842AD1; UC3842AD1;  
UC2843AD1; UC3843AD1;  
UC2844AD1; UC3844AD1;  
UC2845AD1; UC3845AD1  
SO-8  
DIP-8  
UC2842AN; UC3842AN;  
UC2843AN; UC3843AN;  
UC2844AN; UC3844AN;  
UC2845AN; UC3845AN  
2
DESCRIPTION  
The UC384xA family of control ICs provides the  
necessary features to implement off-line or DC to  
DC fixed frequency current mode control schemes  
with a minimal external parts count. Internally im-  
plemented circuits include a trimmed oscillator for  
precise DUTY CYCLE CONTROL under voltage  
lockout featuring start-up current less than 0.5mA,  
a precision reference trimmed for accuracy at the  
error amp input, logic to insure latched operation,  
a PWM comparator which also provides current  
limit control, and a totem pole output stage de-  
signed to source or sink high peak current. The  
output stage, suitable for driving N-Channel MOS-  
FETs, is low in the off-state.  
Differences between members of this family are  
the under-voltage lockout thresholds and maxi-  
mum duty cycle ranges. The UC3842A and  
UC3844A have UVLO thresholds of 16V (on) and  
10V (off), ideally suited off-line applications The  
corresponding thresholds for the UC3843A and  
UC3845A are 8.5 V and 7.9V. The UC3842A and  
UC3843A can operate to duty cycles approaching  
100%. A range of the zero to < 50 % is obtained by  
the UC3844A and UC3845A by the addition of an  
internal toggle flip flop which blanks the output off  
every other clock cycle.  
Figure 2. Block Diagram (toggle flip flop used only in UC3844A and UC3845A)  
7
Vi  
UVLO  
34V  
8
6
5V  
REF  
VREF  
5V 50mA  
5
S/R  
GROUND  
INTERNAL  
BIAS  
2.50V  
VREF GOOD  
LOGIC  
OUTPUT  
4
RT/CT  
OSC  
ERROR AMP.  
T
2R  
+
-
S
2
1
3
VFB  
R
PWM  
LATCH  
R
1V  
COMP  
CURRENT  
SENSE  
CURRENT  
SENSE  
COMPARATOR  
D95IN331  
REV. 5  
1/16  
May 2004  

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