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UC2633N PDF预览

UC2633N

更新时间: 2024-11-09 20:09:11
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
8页 556K
描述
Phase Locked Frequency Controller 16-PDIP -40 to 85

UC2633N 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.87其他特性:MOTION CONTROL APPLICATIONS
模拟集成电路 - 其他类型:PLL FREQUENCY SYNTHESIZERJESD-30 代码:R-PDIP-T16
长度:19.305 mm功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:12 V
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:PLL or Frequency Synthesis Circuits最大供电电压 (Vsup):15 V
最小供电电压 (Vsup):8 V标称供电电压 (Vsup):12 V
表面贴装:NO技术:BIPOLAR
温度等级:INDUSTRIAL端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

UC2633N 数据手册

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UC1633  
UC2633  
UC3633  
Phase Locked Frequency Controller  
FEATURES  
DESCRIPTION  
Precision Phase Locked Frequency  
The UC1633 family of integrated circuits was designed for use in phase  
locked frequency control loops. While optimized for precision speed  
control of DC motors, these devices are universal enough for most ap-  
plications that require phase locked control. A precise reference fre-  
quency can be generated using the device’s high frequency oscillator  
and programmable frequency dividers. The oscillator operates using a  
broad range of crystals, or, can function as a buffer stage to an external  
frequency source.  
Control System  
Crystal Oscillator  
Programmable Reference Frequency  
Dividers  
Phase Detector with Absolute Frequency  
Steering  
The phase detector on these integrated circuits compares the refer-  
ence frequency with a frequency/phase feedback signal. In the case of  
a motor, feedback is obtained at a hall output of other speed detection  
device. This signal is buffered by a sense ampilfier that squares up the  
signal as it goes into the digital phase detector. The phase detector re-  
sponds proportionally to the phase error between the reference and the  
sense amplifier output. This phase detector includes absolute fre-  
quency steering to provide maximum drive signals when any frequency  
error exists. This feature allows optimum start-up and lock times to be  
realized.  
Digital Lock Indicator  
Double Edge Option on the Frequency  
Feedback Sensing Amplifier  
Two High Current Op-Amps  
5V Reference Output  
Two op-amps are included that can be configured to provide necessary  
loop filtering. The outputs of the op-amps will source or sink in excess  
of 16mA, so they can provide a low impedence control signal to driving  
circuits.  
Additional features include a double edge option on the sense amplifier  
that can be used to double the loop reference frequency for increased  
loop bandwidths. A digital lock signal is provided that indicates when  
there is zero frequency error, and a 5V reference output allows DC op-  
erating levels to be accurately set.  
BLOCK DIAGRAM  
4/97  
1

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