UC1848
UC2848
UC3848
Average Current Mode PWM Controller
BLOCK DIAGRAM
FEATURES
• Practical Primary Side Control of
Isolated Power Supplies with DC
Control of Secondary Side Current
• Accurate Programmable Maximum
Duty Cycle Clamp
• Maximum Volt-Second Product Clamp
to Prevent Core Saturation
• Practical Operation Up to 1MHz
• High Current (2A Pk) Totem Pole
Output Driver
• Wide Bandwidth (8MHz) Current Error
Amplifier
• Under Voltage Lockout Monitors VCC,
VIN and VREF
• Output Active Low During UVLO
• Low Startup Current (500µA)
• Precision 5V Reference (1%)
UDG-93003-1
DESCRIPTION
The UC3848 family of PWM control ICs makes primary output driver. The current error amplifier easily interfaces
side average current mode control practical for isolated with an optoisolator from a secondary side voltage sens-
switching converters. Average current mode control in- ing circuit.
sures that both cycle by cycle peak switch current and
A full featured undervoltage lockout (UVLO) circuit is con-
maximum average inductor current are well defined and
tained in the UC3848. UVLO monitors the supply voltage
will not run away in a short circuit situation. The UC3848
to the controller (VCC), the reference voltage (VREF),
can be used to control a wide variety of converter topolo-
and the input line voltage (VIN). All three must be good
before soft start commences. If either VCC or VIN is low,
gies.
In addition to the basic functions required for pulse width
modulation, the UC3848 implements a patented tech-
nique of sensing secondary current in an isolated buck
derived converter from the primary side. A current wave-
form synthesizer monitors switch current and simulates
the inductor current down slope so that the complete cur-
rent waveform can be constructed on the primary side
without actual secondary side measurement. This infor-
mation on the primary side allows for full DC control of
output current.
the supply current required by the chip is only 500µA and
the output is actively held low.
Two on board protection features set controlled limits to
prevent transformer core saturation. Input voltage is mon-
itored and pulse width is constrained to limit the maxi-
mum volt-second product applied to the transformer. A
unique patented technique limits maximum duty cycle
within 3% of a user programmed value.
These two features allow for more optimal use of trans-
formers and switches, resulting in reduced system size
and cost.
The UC3848 circuitry includes a precision reference, a
wide bandwidth error amplifier for average current con-
trol, an oscillator to generate the system clock, latching
PWM comparator and logic circuits, and a high current
Patents embodied in the UC3848 belong to Lambda
Electronics Incorporated and are licensed for use in ap-
plications employing these devices.
4/96