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UC1842AJ/883BC PDF预览

UC1842AJ/883BC

更新时间： 2024-11-04 15:55:51
品牌 Logo 应用领域
德州仪器 - TI 开关
页数 文件大小 规格书
28页 765K
描述
1A SWITCHING CONTROLLER, 500kHz SWITCHING FREQ-MAX, CDIP8

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UC1842AJ/883BC 技术参数

生命周期：Obsolete包装说明：DIP,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.11
模拟集成电路 - 其他类型：SWITCHING CONTROLLER控制模式：CURRENT-MODE
控制技术：PULSE WIDTH MODULATION最大输入电压：30 V
最小输入电压：11 VJESD-30 代码：R-GDIP-T8
功能数量：1端子数量：8
最高工作温度：125 °C最低工作温度：-55 °C
最大输出电流：1 A封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DIP封装形状：RECTANGULAR
封装形式：IN-LINE认证状态：Not Qualified
座面最大高度：5.08 mm表面贴装：NO
切换器配置：SINGLE最大切换频率：500 kHz
技术：BIPOLAR温度等级：MILITARY
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL宽度：7.62 mm
Base Number Matches：1

UC1842AJ/883BC 数据手册

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UC1842/3/4/5  
UC2842/3/4/5  
UC3842/3/4/5  
www.ti.com  
SLUS223C–APRIL 1997–REVISED JUNE 2007  
CURRENT MODE PWM CONTROLLER  
FEATURES  
DESCRIPTION  
•
Optimized For Off-line and DC-to-DC  
Converters  
The UC1842/3/4/5 family of control devices provides  
the necessary features to implement off-line or  
dc-to-dc fixed frequency current mode control  
•
•
•
•
•
•
•
•
•
•
Low Start-Up Current (<1 mA)  
Automatic Feed Forward Compensation  
Pulse-by-Pulse Current Limiting  
Enhanced Load Response Characteristics  
Under-Voltage Lockout With Hysteresis  
Double Pulse Suppression  
schemes with  
a minimal external parts count.  
Internally implemented circuits include under-voltage  
lockout featuring start up current less than 1 mA, a  
precision reference trimmed for accuracy at the error  
amp input, logic to insure latched operation, a PWM  
comparator which also provides current limit control,  
and a totem pole output stage designed to source or  
sink high peak current. The output stage, suitable for  
driving N-Channel MOSFETs, is low in the off state.  
High Current Totem Pole Output  
Internally Trimmed Bandgap Reference  
500-kHz Operation  
Differences between members of this family are the  
under-voltage lockout thresholds and maximum duty  
cycle ranges. The UC1842 and UC1844 have UVLO  
thresholds of 16 VON and 10 VOFF, ideally suited to  
off-line applications. The corresponding thresholds  
for the UC1843 and UC1845 are 8.4 V and 7.6 V.  
The UC1842 and UC1843 can operate to duty cycles  
approaching 100%. A range of zero to 50% is  
obtained by the UC1844 and UC1845 by the addition  
of an internal toggle flip flop which blanks the output  
off every other clock cycle.  
Low RO Error Amp  
BLOCK DIAGRAM  
V
cc  
7 12  
UVLO  
34 V  
5 V  
REF  
S/R  
8 14  
5
4
9
7
GROUND  
V
REF  
5 V  
50 mA  
2.50 V  
Internal  
BIAS  
VREF  
Good  
Logic  
7
11  
V
C
OSC  
R /C  
T
T
6
10  
T
Error  
Amp  
OUTPUT  
S
2R  
R
5
8
PWM  
LATCH  
2
1
3
3
1
5
V
FB  
R
POWER  
GROUND  
1 V  
CURRENT  
SENSE  
COMP  
COMPARATOR  
CURRENT  
SENSE  
Note 1:  
Note 2:  
A = DIL−8 Pin Number. B = SO−14 and CFP−14 Pin Number.  
Toggle flip flop used only in 1844 and 1845.  
A/B  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1997–2007, Texas Instruments Incorporated  
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