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TX5304 PDF预览

TX5304

更新时间: 2024-11-24 20:38:07
品牌 Logo 应用领域
TAOS 静态存储器内存集成电路
页数 文件大小 规格书
6页 132K
描述
Standard SRAM, 128KX16, 100ns, CMOS, CPGA50, 0.100 INCH PITCH, CERAMIC, PGA-50

TX5304 技术参数

生命周期:Contact Manufacturer零件包装代码:PGA
包装说明:PGA,针数:50
Reach Compliance Code:unknownECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.8
最长访问时间:100 ns备用内存宽度:8
JESD-30 代码:R-CPGA-P50长度:25.146 mm
内存密度:2097152 bit内存集成电路类型:STANDARD SRAM
内存宽度:16功能数量:1
端子数量:50字数:131072 words
字数代码:128000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:
组织:128KX16封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:PGA封装形状:RECTANGULAR
封装形式:GRID ARRAY并行/串行:PARALLEL
认证状态:Not Qualified最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:OTHER端子形式:PIN/PEG
端子节距:2.54 mm端子位置:PERPENDICULAR
宽度:14.224 mmBase Number Matches:1

TX5304 数据手册

 浏览型号TX5304的Datasheet PDF文件第2页浏览型号TX5304的Datasheet PDF文件第3页浏览型号TX5304的Datasheet PDF文件第4页浏览型号TX5304的Datasheet PDF文件第5页浏览型号TX5304的Datasheet PDF文件第6页 
Texas Components Corporation TX5304  
2- Megabit (128K X 16) High-Temperature Static RAM  
FEATURES  
APPLICATIONS  
Operation to 200°C  
Popular 50-pin PGA footprint  
Single 5 V supply  
Robust Geometry  
Access time : 100 ns at rated temperature  
Completely static memory  
(128K x 16 bit) or (2 128K x 8 bit) organization  
Tri-state output  
High Temperature Digital Systems  
Petroleum LWD and MWD tools  
Petroleum reservoir monitoring  
DESCRIPTION  
The TX5304 is a CMOS static RAM organized as 131,072 x 16-bit words. The device is packaged  
in a proprietary 50-pin ceramic PGA package employing the 5 x 10 pin footprint with a pitch of 0.1  
inch. Powered by a single +5 V supply, the unit offers low standby power dissipation and is  
suitable for battery backup systems. Three optional access times are available; output lines are  
tri-state; power consumption can be minimized through use of the data retention mode.  
The TX5304 is composed of two individual SRAM modules, each with 128K x 8-bit memory.  
Each module has private enable/select lines permitting store/ access of either 8-bit or 16-bit data.  
FUNCTIONAL BLOCK DIAGRAM  
ADDR [ 0.. 16 ]  
OE  
WE  
Memory 1  
128K X 8 SRAM  
Memory 2  
128K X 8 SRAM  
CS11  
CS21  
CS12  
CS22  
I/O [ 8..15 ]  
I/O [ 0..7 ]  
Copyright 2007 Texas Components Corporation  
www.texascomponents.com  
October 10, 2007  

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