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TWL1106PW PDF预览

TWL1106PW

更新时间： 2024-11-24 02:58:35
品牌 Logo 应用领域
德州仪器 - TI 光电二极管商用集成电路
页数 文件大小 规格书
19页 266K
描述
VOICE-BAND AUDIO PROCESSOR (VBAP™)

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中文翻译

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TWL1106PW 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP, TSSOP20,.25针数：20
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.88商用集成电路类型：CONSUMER CIRCUIT
JESD-30 代码：R-PDSO-G20长度：6.5 mm
功能数量：1端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP20,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3 V认证状态：Not Qualified
座面最大高度：1.2 mm子类别：Other Consumer ICs
最大供电电压 (Vsup)：3.3 V最小供电电压 (Vsup)：2.7 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：4.4 mm

TWL1106PW 数据手册

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SLWS094 – JUNE 2001  
PW PACKAGE  
(TOP VIEW)  
D
Designed for Analog and Digital Wireless  
Handsets, Voice-Enabled Terminals, and  
Telecommunications Applications  
1
2
3
4
5
6
7
8
9
10  
20  
MICMUTE  
RESET  
EARMUTE  
MCLK  
PCMSYNC  
PCMO  
PCMI  
DVSS  
D
D
2.7-V to 3.3-V Operation  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VSS  
Selectable 13-Bit Linear or 8-Bit µ-Law  
Companded Conversion  
EARVSS  
EAROUT+  
EARVDD  
EAROUT–  
EARVSS  
D
D
D
D
D
Differential Microphone Input with External  
Gain Setting  
DVDD  
Differential Earphone Output Capable of  
Driving a 32-Ω to 8-Ω Load  
LINSEL  
MICGAIN–  
MICIN+  
MICGAIN+  
MICIN–  
Programmable Volume Control in Linear  
Mode  
Microphone (MIC) and Earphone (EAR)  
Mute Functions  
Typical Power Dissipation of 0.03 mW in  
Power-Down Mode  
D
D
D
2.048-MHz Master Clock Rate  
300-Hz to 3.4-kHz Passband  
Low Profile 20-Terminal TSSOP Packaging  
description  
The TWL1106 voice-band audio processor (VBAP) is designed to perform transmit encoding analog-to-digital  
(A/D) conversion, receive decoding digital-to-analog (D/A) conversion, and the transmit and receive filtering for  
voice-band communications systems. The TWL1106 device operates in either the 13-bit linear or 8-bit  
companded (µ-law) mode. The VBAP generates its own internal clocks from a 2.048-MHz master clock input.  
This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These  
circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C,  
Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated  
voltages to these high-impedance circuits. During storage or handling, the device leads should be shorted together or the device  
should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriated logic voltage level,  
preferably either V  
or ground. Specific guidelines for handling devices of this type are contained in the publication Guidelines for  
CC  
Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
VBAP is a trademark of Texas Instruments.  
All other trademarks are products of their respective owners.  
Copyright 2001, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...19

中文翻译

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