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TUSB1210BQRHBRQ1

更新时间： 2024-11-20 21:20:59
品牌 Logo 应用领域
德州仪器 - TI 以太网：16GBASE-T电信电信集成电路
页数 文件大小 规格书
62页 561K
描述
LINE TRANSCEIVER

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TUSB1210BQRHBRQ1 技术参数

生命周期：Obsolete包装说明：,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.79
电信集成电路类型：ETHERNET TRANSCEIVERBase Number Matches：1

TUSB1210BQRHBRQ1 数据手册

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Sample &  
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Community  
Product  
Folder  
Tools &  
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TUSB1210-Q1  
SLLSEL4 –SEPTEMBER 2014  
TUSB1210-Q1 Standalone USB Transceiver Chip Silicon  
1 Device Overview  
1.1 Features  
1
Controller Devices via ULPI. Suited to Portable  
Devices or System ASICs with Built-In Controller  
Core.  
• USB2.0 PHY Transceiver Chip, Designed to  
Interface With a USB Controller via a ULPI  
Interface, Fully Compliant With:  
• Complete HS-USB Physical Front-End:  
– Universal Serial Bus Specification Rev. 2.0  
– Supports High Speed (480 Mbit/s), Full Speed  
(12 Mbit/s) and Low Speed (1.5 Mbit/s)  
– On-The-Go Supplement to the USB 2.0  
Specification Rev. 1.3  
– Integrated Phase-Locked Loop (PLL) Supporting  
2 Clock Frequencies 19.2 MHz/26 MHz  
– UTMI+ Low Pin Interface (ULPI) Specification  
Rev. 1.1  
– Integrated 45 Ω ±10% High-Speed Termination  
Resistors, 1.5 kΩ Full-Speed Device Pull-up  
Resistor, 15 kΩ Host Termination Resistors  
– Integrated Transmit and Receive Paths for  
Parallel-to-Serial and Serial-to-Parallel Data  
Conversion  
– USB Data Recovery to Allow Recovery of USB  
Data up to ±500 ppm Frequency Drift  
– Bit-Stuffing Insertion During Transmit and  
Removal During Receive  
– Non-Return-to-Zero Inverted (NRZI) Encoding  
and Decoding  
– Supports Bus Reset, Suspend, Resume and  
High-Speed Detection Handshake (Chirp)  
– HS USB DP/DM Impedance Programmability for  
External Component Compensation  
– ULPI 12-pin SDR Interface  
• DP/DM Line External Component Compensation  
(Patent #US7965100 B1)  
• Interfaces to Host, Peripheral and OTG Device  
Cores; Optimized for Portable Devices or System  
ASICs with Built-in USB OTG Device Core  
• Complete USB OTG Physical Front-End that  
Supports Host Negotiation Protocol (HNP) and  
Session Request Protocol (SRP)  
• VBUS Overvoltage Protection Circuitry Protects  
VBUS Pin in Range –2 V to 20 V  
• Internal 5 V Short-Circuit Protection of DP, DM,  
and ID Pins for Cable Shorting to VBUS Pin  
• ULPI Interface:  
– I/O Interface (1.8V) Optimized for Non-  
Terminated 50 Ω Line Impedance  
– ULPI CLOCK Pin (60 MHz) Supports Both Input  
and Output Clock Configurations  
– Fully Programmable ULPI-Compliant Register  
Set  
• OTG Ver1.3 :  
– Control of External VBUS Switch or Charge  
Pump  
– Both Session Request Protocol (SRP) Methods  
Supported: Data Pulsing and VBUS Pulsing  
– Integrated VBUS Detectors and Cable Detection  
(ID)  
• Full Industrial Grade Operating Temperature  
Range from –40°C to 85°C  
• Available in a 32-Pin Quad Flat No Lead [QFN  
(RHB)] Package  
• Internal Power-On Reset (POR) Circuit  
• Flexible System Integration and Very Low Current  
Consumption, Optimized for Portable Devices  
• Can Be Interfaced to Peripheral, Host or OTG  
1.2 Applications  
•
•
•
Mobile Phones  
•
•
•
Portable Computers  
Video Game Consoles  
Portable Music Players  
Tablet Devices  
Desktop Computers  
1.3 Description  
The TUSB1210-Q1 is a USB2.0 transceiver chip, designed to interface with a USB controller via a ULPI  
interface. It supports all USB2.0 data rates (High-Speed 480Mbps, Full-Speed 12 Mbps and Low-Speed  
1.5Mbps), and is compliant to both Host and Peripheral modes. It additionally supports a UART mode and  
legacy ULPI serial modes.  
TUSB1210-Q1 also supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including  
Host Negotiation Protocol (HNP) and Session Request Protocol (SRP).  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCT PREVIEW Information. Product in design phase of  
development. Subject to change or discontinuance without notice.  
 
 
 
 
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