TUSB1042I
ZHCSGH5D –AUGUST 2017–REVISED MAY 2019
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Pin Functions (continued)
PIN
I/O
DESCRIPTION
NAME
NO.
I2C Programming Mode or GPIO Programming Select. I2C is only disabled when this pin is ‘0".
0 = GPIO mode (I2C disabled)
R = TI Test Mode (I2C enabled at 3.3 V)
F = I2C enabled at 1.8 V
1 = I2C enabled at 3.3 V.
I2C_EN
17
4 Level I
When I2C_EN is not ‘0’, this pin will set the TUSB1042I I2C address.
A1
14
3
4 Level I
4 Level I
SSEQ1
Along with SSEQ0, sets the USB receiver equalizer gain for upstream facing SSTXP/N.
Along with SSEQ1, sets the USB receiver equalizer gain for upstream facing SSTXP/N. When
I2C_EN is not ‘0’, this pin will also set the TUSB1042I I2C address. If I2C_EN = “F”, then this pin
must be set to “F” or “0”.
SSEQ0/A0
11
4 Level I
When I2C_EN=’0’ this is Flip control pin, otherwise this pin is I2C clock. . When used for I2C clock
pullup to I2C master's VCC I2C supply.
FLIP/SCL
21
22
2 Level I
2 Level I
When I2C_EN=’0’ this is a USB3.1 Switch control pin, otherwise this pin is I2C data. When used for
I2C data pullup to I2C master's VCC I2C supply.
CTL0/SDA
9, 10, 12,
13, 15, 16,
18, 19, 24,
25, 26, 27
RSVD1 - 12
TEST1
RSVD
Reserved. Leave open.
2 Level I
(Failsafe)
(PD)
23
Test pin. Pull down to GND.
TEST2
2
4 Level I
Test pin. Leave open.
3.3-V Power Supply
Ground
VCC
1, 6, 20, 28
P
Thermal Pad
G
4
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