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TS80C31X2-VCER PDF预览

TS80C31X2-VCER

更新时间: 2024-01-18 09:50:48
品牌 Logo 应用领域
TEMIC 微控制器外围集成电路时钟
页数 文件大小 规格书
40页 452K
描述
8-bit CMOS Microcontroller 0-60 MHz

TS80C31X2-VCER 数据手册

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TS80C31X2  
8-bit CMOS Microcontroller 0-60 MHz  
1. Description  
TEMIC TS80C31X2 is high performance CMOS and The fully static design of the TS80C31X2 allows to  
reduce system power consumption by bringing the clock  
frequency down to any value, even DC, without loss of  
data.  
ROMless versions of the 80C51 CMOS single chip 8-  
bit microcontroller.  
The TS80C31X2 retains all features of the TEMIC  
TSC80C31 with 128 bytes of internal RAM, a 5-source,  
4 priority level interrupt system, an on-chip oscilator  
and two timer/counters.  
The TS80C31X2 has 2 software-selectable modes of  
reduced activity for further reduction in power  
consumption. In the idle mode the CPU is frozen while  
the timers, the serial port and the interrupt system are still  
operating. In the power-down mode the RAM is saved  
and all other functions are inoperative.  
In addition, the TS80C31X2 has a dual data pointer, a  
more versatile serial channel that facilitates  
multiprocessor communication (EUART) and a X2 speed  
improvement mechanism.  
2. Features  
80C31 Compatible  
Interrupt Structure with  
8031 pin and instruction compatible  
Four 8-bit I/O ports  
5 Interrupt sources,  
4 priority level interrupt system  
Two 16-bit timer/counters  
128 bytes scratchpad RAM  
Full duplex Enhanced UART  
Framing error detection  
Automatic address recognition  
High-Speed Architecture  
40 MHz @ 5V, 30MHz @ 3V  
Power Control modes  
Idle mode  
X2 Speed Improvement capability (6 clocks/  
machine cycle)  
Power-down mode  
Power-off Flag  
30 MHz @ 5V, 20 MHz @ 3V (Equivalent to  
60 MHz @ 5V, 40 MHz @ 3V)  
Once mode (On-chip Emulation)  
Power supply: 4.5-5.5V, 2.7-5.5V  
Dual Data Pointer  
Asynchronous port reset  
Temperature ranges: Commercial (0 to 70oC) and  
Industrial (-40 to 85oC)  
Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP F1  
(13.9 footprint)  
Rev. A - Mar. 19, 1999  
1
Preliminary  

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