Datasheet > TS68C000VE12A

TS68C000VE12A

更新时间： 2024-11-17 04:55:11

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
52页	667K
描述
Microprocessor, 32-Bit, 12.5MHz, HCMOS, CQCC68, CERAMIC, LCC-68

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数据手册

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TS68C000VE12A 数据手册

Features

• 16-/32-bit Data and Address Register

• 16-Mbyte Direct Addressing Range

• 56 Powerful Instruction Types

• Operations on Five Main Data Types

• Memory Mapped Input/Output

• 14 Addressing Modes

• Three Available Versions: 8 MHz/10 MHz and 12.5 MHz

• Military Temperature Range: -55/+125°C

• Power Supply: 5V_DC± 10%

Low Power

HCMOS

16-/32-bit

Hi-Rel

Description

The TS68C000 reduced power consumption device dissipates an order of magnitude

less power than the HMOS TS68000. The TS68C000 is an implementation of the

TS68000 16/32 microprocessor architecture. The TS68C000 has a 16-bit data bus

and 24-bit address bus while the full architecture provides for 32-bit address and data-

buses. It is completely code-compatible with the HMOS TS68000, TS68008 8-bit data

bus implementation of the TS68000 and the TS68020 32-bit implementation of the

architecture. Any user-mode programs written using the TS68C000 instruction set will

run unchanged on the TS68000, TS68008 and TS68020. This is possible because the

user programming model is identical for all processors and the instruction sets are

proper sub-sets of the complete architecture.

Microprocessor

TS68C000

Screening/Quality

This product is manufactured in full compliance with:

• MIL-STD-883 class B

• DESC drawing 5962-89462

• Atmel standards

C Suffix

F Suffix

DIL 64

Ceramic Package

CQFP 68

Ceramic Quad Flat Pack (on request)

E Suffix

LCCC 68

R Suffix

PGA 68

Leadless Ceramic Chip Carrier

Pin Grid Array

Rev. 2170A–HIREL–09/05

12 3 4 5 6 7...52

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