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TS3L100DBQR PDF预览

TS3L100DBQR

更新时间: 2024-01-17 07:23:06
品牌 Logo 应用领域
德州仪器 - TI 开关光电二极管局域网
页数 文件大小 规格书
21页 473K
描述
QUAD SPDT WIDE-BANDWIDTH LAN SWITCH WITH LOW ON-STATE RESISTANCE

TS3L100DBQR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:0.89
模拟集成电路 - 其他类型:SPDT标称带宽:350 MHz
最大输入电压:5.5 V最小输入电压:
JESD-30 代码:R-PDSO-G16JESD-609代码:e4
长度:5 mm湿度敏感等级:1
正常位置:NO信道数量:4
功能数量:4端子数量:16
标称断态隔离度:42 dB通态电阻匹配规范:1 Ω
最大通态电阻 (Ron):1 Ω最高工作温度:70 °C
最低工作温度:输出:SEPARATE OUTPUT
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
座面最大高度:1 mm最大信号电流:0.128 A
子类别:Multiplexer or Switches最大供电电流 (Isup):0.003 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
最长断开时间:3.5 ns最长接通时间:7.5 ns
切换:BREAK-BEFORE-MAKE温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

TS3L100DBQR 数据手册

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ꢀꢁ ꢂꢃ ꢄꢅ ꢅ  
ꢆ ꢇꢈꢉ ꢁꢊ ꢉꢀ ꢋ ꢌꢉꢍ ꢎꢏꢈꢐꢉꢋ ꢌ ꢉꢀ ꢑ ꢃ ꢈꢐ ꢁ ꢋꢌ ꢀꢒ ꢑ  
ꢋ ꢌꢀ ꢑ ꢃ ꢓ ꢋ ꢓ ꢐꢎꢁꢀꢈꢀ ꢍ ꢔꢍꢁ ꢌ ꢁꢀꢈ ꢐꢒ ꢍ  
SCDS161A − MAY 2004 – REVISED OCTOBER 2004  
D
D
Wide Bandwidth (BW = 350 MHz Min)  
Low Differential Crosstalk  
D
D
D
Data and Control Inputs Have Undershoot  
Clamp Diodes  
(X  
= −68 dB Typ)  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
TALK  
D
Low Power Consumption (I  
= 10 mA Max)  
CC  
ESD Performance Tested Per JESD 22  
− 2000-V Human-Body Model  
(A114-B, Class II)  
D
Bidirectional Data Flow, With Near-Zero  
Propagation Delay  
D
D
Low ON-State Resistance (r = 5 W Typ)  
on  
− 1000-V Charged-Device Model (C101)  
Rail-to-Rail Switching on Data I/O Ports  
D
Suitable for Both 10 Base-T/100 Base-T  
Signaling  
(0 to V  
)
CC  
D
V Operating Range From 3 V to 3.6 V  
CC  
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
RGY PACKAGE  
(TOP VIEW)  
D, DBQ, DGV, OR PW PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
E
ID  
ID  
YD  
IC  
S
CC  
1
16  
IA  
0
IA  
IA  
15  
14  
13  
12  
11  
10  
2
3
4
5
6
7
E
ID  
ID  
YD  
IC  
0
1
1
0
YA  
IA  
1
0
1
IB  
YA  
0
IB  
1
YB  
IB  
0
0
IC  
1
YC  
IB  
1
YB  
0
GND  
IC  
1
8
9
description/ordering information  
The TI TS3L100 LAN switch is a 4-bit 1-of-2 multiplexer/demultiplexer with a single switch-enable (E) input.  
When E is low, the switch is enabled and the I port is connected to the Y port. When E is high, the switch is  
disabled and the high-impedance state exists between the I and Y ports. The select (S) input controls the data  
path of the multiplexer/demultiplexer.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
QFN − RGY  
SOIC − D  
Tape and reel  
Tube  
TS3L100RGYR  
TK100  
TS3L100D  
TS3L100  
TK100  
Tape and reel  
TS3L100DR  
TS3L100DBQR  
TS3L100PW  
TS3L100PWR  
TS3L100DGVR  
0°C to 70°C  
SSOP (QSOP) − DBQ Tape and reel  
Tube  
TSSOP − PW  
TK100  
TK100  
Tape and reel  
TVSOP − DGV  
Tape and reel  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢀꢠ  
Copyright 2004, Texas Instruments Incorporated  
ꢜ ꢠ ꢝ ꢜꢕ ꢖꢪ ꢘꢗ ꢛ ꢣꢣ ꢡꢛ ꢙ ꢛ ꢚ ꢠ ꢜ ꢠ ꢙ ꢝ ꢥ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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