Datasheet > TQ1090

TQ1090

更新时间： 2024-11-17 22:19:15

品牌	Logo	应用领域
TRIQUINT		时钟
页数	文件大小	规格书
10页	250K
描述
11-Output Configurable Clock Buffer

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TQ1090 数据手册

S E M I C O N D U C T O R , I N C .

TQ1090

Figure 1. Block Diagram

FBIN S1 REFCLK S0 GND GND GND

11-Output

Configurable

Clock Buffer

TEST

VDD

Q10

Phase

Detector

VCO

MUX

GND

Features

Divide Logic

÷ 2

S1 S0

• Wide frequency range:

33 MHz to 45 MHz

65 MHz to 90 MHz and

130 MHz to 180 MHz

Output Buffers

Group C

Group A

VDD

Group B

• Output configurations:

four outputs at f_REF

GND Q3

VDD Q5

Q6 GND

four outputs at 2x f_REF

two output at 4x f_REFor

five outputs at ¹/₂x f_REF

three outputs at f_REF

TriQuint’s TQ1090 is a configurable clock buffer which generates 11

outputs, operating over a wide range of frequencies from 33 MHz to

45MHz, 65 MHz to 90 MHz and 130 MHz to 180 MHz. The outputs are

available at 1x, 2x and 4x, or at ¹/₂x, 1x and 2x, or at ¹/₄x, ¹/₂x and

two outputs at 2x f_REF

• Selectable Phase Shift:

1x the reference clock frequency, f_REF

–2t, –t, 0, +t (t = 1/f_vco

)

• Low output-to-output skew:

150 ps (max) within a group

When one of the Group A outputs (Q0–Q4) is used as feedback to the PLL,

all Group A outputs will be at f_REF, all Group B outputs (Q5–Q8) will be at

2x f_REFand all Group C outputs (Q9,Q10) will be at 4x f_REF. When one of the

Group B outputs is used as feedback to the PLL, all Group A outputs will

be at ¹/₂x f_REF, all Group B outputs will be at f_REFand all Group C outputs

will be at 2x f_REF. When one of the Group C outputs is used as feedback to

the PLL, all Group A outputs will be at ¹/₄x f_REF, all Group B outputs will be

• Near-zero propagation delay

–350 ps ± 500 ps (max) or

–350 ps ±700 ps (max)

• TTL-compatible I/O with 30 mA

output drive

• Ideal for Power PC^™designs

at ¹/₂x f_REFand all Group C outputs will be at f_REF

• 28-pin J-lead surface-mount

package

A very stable internal Phase-Locked Loop (PLL) provides low-jitter operation

This completely self-contained PLL requires no external capacitors or

resistors. The PLL’s Voltage-Controlled Oscillator (VCO) has a frequency

range from 260 MHz to 360 MHz. By feeding back one of the output clocks

to FBIN, the PLL continuously maintains frequency and phase synchron-

ization between the reference clock (REFCLK) and each of the outputs.

For additional information and latest specifications, see our website: www.triquint.com

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