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TPS65197RUYR PDF预览

TPS65197RUYR

更新时间: 2024-11-16 11:46:07
品牌 Logo 应用领域
德州仪器 - TI 转换器电平转换器驱动程序和接口接口集成电路
页数 文件大小 规格书
7页 300K
描述
8-Channel Level-Shifter Supporting Different Charge-Sharing Methods and Panel

TPS65197RUYR 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active包装说明:WQFN-28
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.58Is Samacsys:N
接口集成电路类型:INTERFACE CIRCUITJESD-30 代码:S-PQCC-N28
JESD-609代码:e4长度:4 mm
湿度敏感等级:2标称负供电电压:-8 V
功能数量:1端子数量:28
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260座面最大高度:0.8 mm
最大供电电压:45 V最小供电电压:16.5 V
标称供电电压:30 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.4 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4 mmBase Number Matches:1

TPS65197RUYR 数据手册

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TPS65197  
www.ti.com  
SLVSBD7 APRIL 2012  
8-Channel Level-Shifter Supporting Different Charge-Sharing Methods and Panel  
Discharge  
Check for Samples: TPS65197  
1
FEATURES  
DESCRIPTION  
The TPS65197 is an 8-channel level-shifter with  
discharge function intended for use in LCD display  
applications such as TVs and monitors.  
8-Channel Level-Shifter Supporting STV,  
RESET, 6 × CLK  
2-Channel Panel Discharge  
The device converts the timing-controller (T-CON)  
logic-level signals to the high-level signals needed by  
the gate-in-panel (GIP) display.  
High Output-Voltage Level up to 45 V  
Low Output-Voltage Level Down to –20 V  
Selectable Charge-Sharing  
The clock outputs, CLKOUTx, support normal  
operation and two different charge-sharing methods,  
which can be used to improve picture quality and  
power consumption. At power down, all outputs follow  
their input signals as long as possible; when the  
discharge function is used, the outputs are pulled  
high (VGH).  
Disabled  
Method 1  
Method 2  
Supports 100-kHz Clock Operating Frequency  
28-Terminal 4-mm × 4-mm QFN Package  
APPLICATIONS  
Gate-in-Panel (GIP) LCD TVs and Monitors  
SEL_CS  
VGH  
CLKIN1  
CLKOUT1  
CS_1  
VGH  
VGL1  
CLKIN2  
CLKOUT2  
CS_2  
VGH  
VGL1  
VGH  
CLKOUT3  
CLKIN3  
Charge-  
Sharing  
logic  
CS_3  
VGL1  
CLKIN4  
CLKOUT4  
CS_4  
VGH  
VGL1  
CLKOUT5  
CLKIN5  
VGH  
VGL1  
CLKIN6  
CLKOUT6  
STVOUT  
VGH  
VGL1  
VGH  
STVIN  
VGL1  
RESETIN  
RESETOUT  
VGH  
VGL1  
DIS_SENSE  
DISCH1  
VGH  
VREF  
VGH  
VGL1  
VGL1  
VGL2  
DISCH2  
Logic all outputs = VGH  
when DIS_SENSE < VREF  
VGL2  
GND  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2012, Texas Instruments Incorporated  

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