Datasheet > TPL910

TPL910

更新时间： 2024-04-09 18:59:21

品牌	Logo	应用领域
思瑞浦 - 3PEAK		/
页数	文件大小	规格书
18页	694K
描述
1-A Output, High-PSRR, Low-Noise Low-Dropout Linear Regulator

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TPL910 数据手册

TPL910 Series

1-A Output, High-PSRR, Low-Noise LDO Regulator

Pin Configuration and Functions

TPL910 Series

DFN-8 Package

Top View

OUT

Exposed

PAD

GND

Pin Functions

NAME

PIN NUMBER

TYPE

DESCRIPTION

Regulator enable pin. Drive EN high to turn on the regulator; drive EN low to turn off

the regulator. For automatic startup, connect EN to IN directly.

Output voltage feedback pin. Connect to an external resistor divider to adjust the

output voltage. A 10-nF feed-forward capacitor from FB to OUT (as close as possible

to FB pin) is recommended to maximize regulator ac performance.

GND

–

Ground reference pin. Connect GND pin to PCB ground plane directly.

Input voltage pin. A 10-μF or larger ceramic capacitor from IN to ground (as close as

possible to IN pin) is required to reduce the jitter from previous-stage power supply.

Noise-reduction and soft-start pin. A 10-nF or larger capacitor from NR/SS to GND

(as close as possible to NR/SS pin) is recommended to maximize ac performance.

Regulated output voltage pin. A 10-μF or larger ceramic capacitor from OUT to ground

(as close as possible to OUT pin) is required to ensure regulator stability.

7, 8

OUT

1, 2

(1) Exposed PAD must be connected to a large-area ground plane to maximum the thermal performance.

www.3peak.com

Rev.A.1

5 / 18

1 2 3 456 7 8...18

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