TP2424ND

更新时间： 2024-01-15 20:26:25

品牌	Logo	应用领域
超科 - SUPERTEX		晶体小信号场效应晶体管开关输入元件
页数	文件大小	规格书
2页	437K
描述
P-Channel Enhancement-Mode Vertical DMOS FETs

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中文翻译

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技术参数
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TP2424ND 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Transferred	零件包装代码：	DIE
包装说明：	UNCASED CHIP, X-XUUC-N	Reach Compliance Code：	compliant
ECCN代码：	EAR99	风险等级：	5.75
Is Samacsys：	N	其他特性：	HIGH INPUT IMPEDANCE
配置：	SINGLE WITH BUILT-IN DIODE	最小漏源击穿电压：	240 V
最大漏极电流 (ID)：	0.316 A	最大漏源导通电阻：	8 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR	最大反馈电容 (Crss)：	40 pF
JESD-30 代码：	X-XUUC-N	JESD-609代码：	e0
元件数量：	1	端子数量：	2
工作模式：	ENHANCEMENT MODE	封装主体材料：	UNSPECIFIED
封装形状：	UNSPECIFIED	封装形式：	UNCASED CHIP
峰值回流温度（摄氏度）：	NOT SPECIFIED	极性/信道类型：	P-CHANNEL
认证状态：	Not Qualified	表面贴装：	YES
端子面层：	TIN LEAD	端子形式：	NO LEAD
端子位置：	UPPER	处于峰值回流温度下的最长时间：	NOT SPECIFIED
晶体管应用：	SWITCHING	晶体管元件材料：	SILICON
Base Number Matches：	1

TP2424ND 数据手册

TP2424

Low Threshold

P-Channel Enhancement-Mode

Vertical DMOS FETs

Ordering Information

Order Number / Package

BV_DSS

R_DS(ON)

(max)

8.0Ω

V_GS(th)

(max)

-2.4V

I_D(ON)

(min)

BV_DGS

TO-243AA*

Die

-240V

-800mA

TP2424N8

TP2424ND

* Same as SOT-89. Product supplied on 2000 piece carrier tape reels.

Product marking for TO-243AA:

TP4C❋

where ❋ = 2-week alpha date code

Features

❏

Low threshold

High input impedance

Low Threshold DMOS Technology

Low input capacitance

These low threshold enhancement-mode (normally-off) power

transistors utilize a vertical DMOS structure and Supertex's well-

proven silicon-gate manufacturing process. This combination

produces devices with the power handling capabilities of bipolar

transistors and with the high input impedance and positive

temperature coefficient inherent in MOS devices. Characteristic

of all MOS structures, these devices are free from thermal

runaway and thermally induced secondary breakdown.

Fast switching speeds

Free from secondary breakdown

Low input and output leakage

Complementary N- and P-channel devices

Supertex’s vertical DMOS FETs are ideally suited to a wide range

of switching and amplifying applications where very low threshold

voltage, highbreakdownvoltage, highinputimpedance, lowinput

capacitance, and fast switching speeds are desired.

Applications

❏

Logic level interfaces – ideal for TTL and CMOS

Solid state relays

Linear Amplifiers

Package Option

Power Management

Analog switches

Telecom switches

Absolute Maximum Ratings

Drain-to-Source Voltage

BV_DSS

BV_DGS

± 20V

Drain-to-Gate Voltage

Gate-to-Source Voltage

TO-243AA

(SOT-89)

Operating and Storage Temperature

Soldering Temperature*

-55°C to +150°C

300°C

* Distance of 1.6 mm from case for 10 seconds.

Note: See Package Outline section for dimensions.

11/12/01

Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability

indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to

workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the

Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.

中文翻译

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