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TP2435N8-G PDF预览

TP2435N8-G

更新时间: 2024-11-19 13:14:51
品牌 Logo 应用领域
超科 - SUPERTEX /
页数 文件大小 规格书
4页 495K
描述
Power Field-Effect Transistor, 0.231A I(D), 350V, 15ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-243AA, GREEN PACKAGE-3

TP2435N8-G 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOT-89
包装说明:SMALL OUTLINE, R-PSSO-F3针数:3
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8541.29.00.95风险等级:8.5
其他特性:LOGIC LEVEL COMPATIBLE, LOW THRESHOLD外壳连接:DRAIN
配置:SINGLE最小漏源击穿电压:350 V
最大漏极电流 (ID):0.231 A最大漏源导通电阻:15 Ω
FET 技术:METAL-OXIDE SEMICONDUCTORJEDEC-95代码:TO-243AA
JESD-30 代码:R-PSSO-F3JESD-609代码:e3
湿度敏感等级:1元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
封装主体材料:PLASTIC/EPOXY封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
极性/信道类型:P-CHANNEL最大脉冲漏极电流 (IDM):1.1 A
认证状态:Not Qualified表面贴装:YES
端子面层:Matte Tin (Sn)端子形式:FLAT
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

TP2435N8-G 数据手册

 浏览型号TP2435N8-G的Datasheet PDF文件第2页浏览型号TP2435N8-G的Datasheet PDF文件第3页浏览型号TP2435N8-G的Datasheet PDF文件第4页 
TP2435  
Low Threshold  
P-Channel Enhancement-Mode  
Vertical DMOS FETs  
Ordering Information  
Order Number / Package  
BVDSS  
/
RDS(ON)  
(max)  
15  
VGS(th)  
(max)  
-2.4V  
ID(ON)  
(min)  
BVDGS  
TO-243AA*  
Die**  
-350V  
-800mA  
TP2435N8  
TP2435NW  
*
Same as SOT-89. Product supplied on 2000 piece carrier tape reels.  
** Die in wafer form.  
Product marking for TO-243AA:  
TP4S  
where = 2-week alpha date code  
Low Threshold DMOS Technology  
Features  
These low threshold enhancement-mode (normally-off) power  
transistors utilize a vertical DMOS structure and Supertex's well-  
proven silicon-gate manufacturing process. This combination  
produces devices with the power handling capabilities of bipolar  
transistors and with the high input impedance and positive  
temperature coefficient inherent in MOS devices. Characteristic  
of all MOS structures, these devices are free from thermal  
runaway and thermally induced secondary breakdown.  
Low threshold  
High input impedance  
Low input capacitance  
Fast switching speeds  
Free from secondary breakdown  
Low input and output leakage  
Complementary N- and P-channel devices  
Supertex’s vertical DMOS FETs are ideally suited to a wide range  
of switching and amplifying applications where very low threshold  
voltage, highbreakdownvoltage, highinputimpedance, lowinput  
capacitance, and fast switching speeds are desired.  
Applications  
Logic level interfaces  
Solid state relays  
Linear Amplifiers  
Power Management  
Analog switches  
Telecom switches  
Package Option  
D
G
D
S
Absolute Maximum Ratings  
TO-243AA  
(SOT-89)  
Drain-to-Source Voltage  
BVDSS  
BVDGS  
± 20V  
Drain-to-Gate Voltage  
Gate-to-Source Voltage  
Operating and Storage Temperature  
Soldering Temperature*  
-55°C to +150°C  
300°C  
Note: See Package Outline section for dimensions.  
* Distance of 1.6 mm from case for 10 seconds.  
11/12/01  
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability  
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to  
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the  
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.  

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