TMS380C26
NETWORK COMMPROCESSOR
SPWS010A–APRIL 1992–REVISED MARCH 1993
• IEEE 802.5 and IBM Token-Ring Network
• Low-Cost Host-Slave I/O Interface Option
• Up to 32-Bit Host Address Bus
• Selectable Host System Bus Options
Compatible
• IEEE 802.3 and Blue Book Ethernet
Network Compatible
• 80x8x or 68xxx-Type Bus and Memory
• Pin and Software Compatible With the
Organization
TMS380C16
– 8- or 16-Bit Data Bus on 80x8x Buses
– Optional Parity Checking
• Configurable Network Type and Speed:
– Selectable by Host Software Control
(Adapter Control Register)
• Dual-Port DMA and Direct I/O Transfers to
Host Bus
– Selectable by Network Front-End
– Readable from Host (Adapter Control
Register)
• Specification for External Adapter-Bus
Devices (SEADs) Supports External
Hardware Interface for User-Defined
External Logic
• Token-Ring Features
– 16- or 4-Megabit-per-Second Data Rates
– Supports up to 18K-Byte Frame Size
(16 Mbps Operation Only)
• Enhanced Address Copy Option (EACO)
Interface Supports External Address
Checking Logic for Bridging or External
Custom Applications
– Supports Universal and Local Network
Addressing
– Early Token Release Option (16 Mbps
Operation Only)
• Support for Module High-Impedance
In-Circuit Testing
• Built-in Real-Time Error Detection
– Compatible With the TMS38054
• Bring-Up and Self-Test Diagnostics With
• Ethernet Features
Loopback
– 10-Megabit-per-Second Data Rate
– Compatible With Most Ethernet Serial
Network Interface Devices
• Automatic Frame Buffer Management
• Slow-Clock Low-Power Mode
• Single 5-V Supply
– Full Duplex Ethernet Operation Allows
Network Speed Self-test
• 1-µm CMOS Technology
• 250 mA Typical Latch-Up Immunity at 25°C
• ESD Protection Exceeds 2,000 V
• Expandable Local LAN Subsystem Memory
Space up to 2 Megabytes
• Supports Multicast Addressing of Network
Group Addresses Through Hashing
• 132-Pin JEDEC Plastic Quad Flat Package
(PQ Suffix)
• Glueless Interface to DRAMs
• Operating Temperature Range
0°C to 70 °C
• High-Performance 16-Bit CPU for
Communications Protocol Processing
• Up to 8 Megabyte-per-Second High-Speed
Bus Master DMA Interface
network commprocessor applications diagram
LAN Subsystem
Transmit
Attached
System
Bus
Token Ring or
Ethernet Physical
Layer Circuitry
To
Network
TMS380C26
Memory
Receive
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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