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TMS320F2808NMFS

更新时间： 2024-11-24 02:40:19
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德州仪器 - TI /
页数 文件大小 规格书
150页 1802K
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TMS320F280x, TMS320C280x, TMS320F2801x digital signal processors

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Support &  
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TMS320F2809, TMS320F2808, TMS320F2806, TMS320F2802, TMS320F2801  
TMS320C2802, TMS320C2801, TMS320F28016, TMS320F28015  
SPRS230O –OCTOBER 2003–REVISED MARCH 2019  
TMS320F280x, TMS320C280x, TMS320F2801x digital signal processors  
1 Device Overview  
1.1 Features  
1
• High-performance static CMOS technology  
– 100 MHz (10-ns cycle time)  
• Enhanced control peripherals  
– Up to 16 PWM outputs  
– 60 MHz (16.67-ns cycle time)  
– Low-power (1.8-V core, 3.3-V I/O) design  
• JTAG boundary scan support  
– IEEE Standard 1149.1-1990 Standard Test  
Access Port and Boundary Scan Architecture  
• High-performance 32-bit CPU (TMS320C28x)  
– 16 × 16 and 32 × 32 MAC operations  
– 16 × 16 dual MAC  
– Up to 6 HRPWM outputs with 150-ps MEP  
resolution  
– Up to four capture inputs  
– Up to two quadrature encoder interfaces  
– Up to six 32-bit/six 16-bit timers  
• Serial port peripherals  
– Up to 4 SPI modules  
– Up to 2 SCI (UART) modules  
– Up to 2 CAN modules  
– Harvard bus architecture  
– Atomic operations  
– One Inter-Integrated-Circuit (I2C) bus  
• 12-bit ADC, 16 channels  
– Fast interrupt response and processing  
– Unified memory programming model  
– Code-efficient (in C/C++ and Assembly)  
• On-chip memory  
– 2 × 8 channel input multiplexer  
– Two sample-and-hold  
– Single/simultaneous conversions  
– F2809: 128K × 16 flash, 18K × 16 SARAM  
F2808: 64K × 16 flash, 18K × 16 SARAM  
F2806: 32K × 16 flash, 10K × 16 SARAM  
F2802: 32K × 16 flash, 6K × 16 SARAM  
F2801: 16K × 16 flash, 6K × 16 SARAM  
F2801x: 16K × 16 flash, 6K × 16 SARAM  
– Fast conversion rate:  
80 ns - 12.5 MSPS (F2809 only)  
160 ns - 6.25 MSPS (280x)  
267 ns - 3.75 MSPS (F2801x)  
– Internal or external reference  
• Up to 35 individually programmable, multiplexed  
GPIO pins with input filtering  
– 1K × 16 OTP ROM (flash devices only)  
– C2802: 32K × 16 ROM, 6K × 16 SARAM  
C2801: 16K × 16 ROM, 6K × 16 SARAM  
• Boot ROM (4K × 16)  
– With software boot modes (via SCI, SPI, CAN,  
I2C, and parallel I/O)  
– Standard math tables  
• Clock and system control  
– On-chip oscillator  
– Watchdog timer module  
• Any GPIO A pin can be connected to one of the  
three external core interrupts  
• Peripheral Interrupt Expansion (PIE) block that  
supports all 43 peripheral interrupts  
• Endianness: Little endian  
• Advanced emulation features  
– Analysis and breakpoint functions  
– Real-time debug via hardware  
• Development support includes  
– ANSI C/C++ compiler/assembler/linker  
– Code Composer Studio™ IDE  
– SYS/BIOS  
– Digital motor control and digital power software  
libraries  
• Low-power modes and power savings  
– IDLE, STANDBY, HALT modes supported  
– Disable individual peripheral clocks  
• Package options  
– Thin quad flatpack (PZ)  
– MicroStar BGA™ (GGM, ZGM)  
• Temperature options  
• 128-bit security key/lock  
– Protects flash/OTP/L0/L1 blocks  
– Prevents firmware reverse-engineering  
• Three 32-bit CPU timers  
– A: –40°C to 85°C (PZ, GGM, ZGM)  
– S: –40°C to 125°C (PZ, GGM, ZGM)  
– Q: –40°C to 125°C (PZ)  
(AEC-Q100 qualification for automotive  
applications)  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
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