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TMP320C40KGDL50C PDF预览

TMP320C40KGDL50C

更新时间: 2024-11-19 13:17:27
品牌 Logo 应用领域
德州仪器 - TI 时钟外围集成电路
页数 文件大小 规格书
14页 181K
描述
32-BIT, 50MHz, OTHER DSP, UUC325, DIE-325

TMP320C40KGDL50C 技术参数

生命周期:Obsolete零件包装代码:DIE
包装说明:DIE, DIE OR CHIP针数:325
Reach Compliance Code:unknownECCN代码:3A001.A.3
HTS代码:8542.31.00.01风险等级:5.84
地址总线宽度:31桶式移位器:NO
位大小:32边界扫描:YES
最大时钟频率:50 MHz外部数据总线宽度:32
格式:FLOATING POINT内部总线架构:MULTIPLE
JESD-30 代码:R-XUUC-N325低功率模式:NO
端子数量:325最高工作温度:70 °C
最低工作温度:封装主体材料:UNSPECIFIED
封装代码:DIE封装等效代码:DIE OR CHIP
封装形状:RECTANGULAR封装形式:UNCASED CHIP
认证状态:Not QualifiedRAM(字数):8192
子类别:Digital Signal Processors表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:NO LEAD端子位置:UPPER
uPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches:1

TMP320C40KGDL50C 数据手册

 浏览型号TMP320C40KGDL50C的Datasheet PDF文件第2页浏览型号TMP320C40KGDL50C的Datasheet PDF文件第3页浏览型号TMP320C40KGDL50C的Datasheet PDF文件第4页浏览型号TMP320C40KGDL50C的Datasheet PDF文件第5页浏览型号TMP320C40KGDL50C的Datasheet PDF文件第6页浏览型号TMP320C40KGDL50C的Datasheet PDF文件第7页 
TMP320C40KGDC, SMJ320C40KGDC, TMP320C40KGDCT, SMJ320C40KGDCT  
FLOATING-POINT DIGITAL SIGNAL PROCESSOR  
KNOWN GOOD DIES  
SGUS024C – MARCH 1997 – REVISED OCTOBER 2001  
SMJ: QML Processing to MIL–PRF–38535  
TMP: Commercial Level Processing  
Operating Temperature Ranges:  
– Military (M) 55°C to 125°C  
– Commercial (C) 25°C to 85°C  
– Commercial (L) 0°C to 70°C  
Two Identical External Data and Address  
Buses Supporting Shared Memory Systems  
and High Data-Rate, Single-Cycle  
Transfers:  
– High Port-Data Rate of 100 MBytes/s  
(Each Bus)  
– 16G-Byte Continuous  
Program/Data/Peripheral Address Space  
– Memory-Access Request for Fast,  
Intelligent Bus Arbitration  
– Separate Address-, Data-, and  
Control-Enable Pins  
– Four Sets of Memory-Control Signals  
Support Different Speed Memories in  
Hardware  
Fabricated Using Enhanced Performance  
Implanted CMOS (EPIC ) Technology by  
Texas Instruments (TI )  
Highest Performance Floating-Point Digital  
Signal Processor (DSP)  
– ’C40-50:  
40-ns Instruction Cycle Time:  
50 MFLOPS, 25 MIPS, 275 MOPS,  
320 MBps  
– ’C40-40:  
50-ns Instruction Cycle Time:  
40 MFLOPS, 20 MIPS, 220 MOPS,  
256 MBps  
Six Communications Ports  
6-Channel Direct Memory Access (DMA)  
Coprocessor  
Separate Internal Program, Data, and DMA  
Coprocessor Buses for Support of Massive  
Concurrent Input/Output (I/O) of Program  
and Data Throughput, Maximizing  
Sustained Central Processing Unit (CPU)  
Performance  
Single-Cycle Conversion to and From  
IEEE-745 Floating-Point Format  
Single Cycle 1/x, 1/  
x
On-Chip Program Cache and  
Source-Code Compatible With SMJ320C30  
Validated Ada Compiler  
Dual-Access/Single-Cycle RAM for  
Increased Memory-Access Performance  
– 512-Byte Instruction Cache  
– 8K Bytes of Single-Cycle Dual-Access  
Program or Data RAM  
– ROM-Based Bootloader Supports  
Program Bootup Using 8-, 16-, or 32-Bit  
Memories Over Any One of the  
Communications Ports  
Single-Cycle 40-Bit Floating-Point,  
32-Bit Integer Multipliers  
12 40-Bit Registers, 8 Auxiliary Registers,  
14 Control Registers, and 2 Timers  
IEEE Standard 1149.1 Test-Access Port  
(JTAG)  
description  
The TMP/SMJ320C40KGD DSP is a 32-bit, floating-point processor manufactured in 0.72-µm, double-level  
metal CMOS technology. It is the fourth generation of DSPs from Texas Instruments, and it is the world’s first  
DSP designed for parallel processing. The on-chip parallel processing capabilities of the ’C40 make the  
floating-point performance required by many applications achievable and cost-effective.  
The TMP/SMJ320C40 is the first DSP with on-chip communication ports for processor-to-processor  
communication using simple communication software with no external hardware. This allows connectivity with  
no external glue logic. The communication ports remove I/O bottlenecks, and the independent smart-DMA  
coprocessor is able to handle the CPU I/O requirements.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
IEEE Standard 1149.1–1990 Standard Test-Access Port and Boundary-Scan Architecture  
EPIC and TI are trademarks of Texas Instruments Incorporated.  
Copyright 2001, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251–1443  

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