Datasheet > TMC2250AKEC

TMC2250AKEC

更新时间： 2024-11-25 05:52:15

品牌	Logo	应用领域
CADEKA		外围集成电路时钟
页数	文件大小	规格书
23页	293K
描述
Matrix Multiplier 12 x 10 bit, 50 MHz

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

TMC2250AKEC 数据手册

www.cadeka.com

TMC2250A

Matrix Multiplier

12 x 10 bit, 50 MHz

Features

Applications

• Four user-selectable ﬁltering and transformation

functions:

• Image ﬁltering and manipulation

• Video effects generation

– Triple dot product (3 x 3) matrix multiply

– Cascadeable 9-tap systolic FIR ﬁlter

– Cascadeable 3 x 3-pixel image convolver

– Cascadeable 4 x 2-pixel image convolver

• 50 MHz (20ns) pipelined throughput

• 12-bit input and output data, 10-bit coefﬁcients

• 6-bit cascade input and output ports in all ﬁlter modes

• Onboard coefﬁcient storage, with three-cycle updating of

all nine coefﬁcients

• Video standards conversion and encoding/decoding

• Three-dimensional image manipulation

• Medical image processing

• Edge detection for object recognition

• FIR ﬁltering for communications systems

Description

The TMC2250A is a ﬂexible high-performance nine-multiplier

array VLSI circuit which can execute a cascadeable 9-tap

FIR ﬁlter, a cascadeable 4 x 2 or 3 x 3-pixel image convolu-

tion, or a 3 x 3 color space conversion. All conﬁgurations

offer throughput at up to the maximum guaranteed 50 MHz

clock rate with 12-bit data and 10-bit coefﬁcients. All inputs

and outputs are registered on the rising edges of the clock.

The cascadeable 3 x 3 and 4 x 2-pixel image convolver func-

tions allow the user to perform numerous image processing

functions, including static ﬁlters and edge detectors. The 16-bit

cascade input port facilitates two-chip 50 MHz cubic convo-

lution (4 x 4-pixel kernel).

The TMC2250A is fabricated in a sub-micron CMOS process

and operates at clock speeds of up to 50 MHz over the full

commercial (0°C to 70°C) temperature and supply voltage

ranges. It is available in 120-pin Plastic Pin Grid Array

(PPGA) packages, 120-lead Ceramic Pin Grid Array pack-

age (CPGA), 120-lead PQFP to PPGA package (MPGA) and

120-lead Plastic Quad FlatPack (PQFP). All input and output

signals are TTL compatible.

The 3 x 3 matrix multiply or color conversion conﬁguration

can perform video standard conversion (YIQ or YUV to

RGB, etc.) or three-dimensional perspective translation at

real-time video rates.

The 9-tap FIR ﬁlter conﬁguration, useful in Video, Telecom-

munications, and Signal Processing, features a 16-bit cascade

input to allow construction of longer ﬁlters.

REV. 1.0.2 10/25/00

12 3 4 5 6 7...23

中文翻译

下载PDF

与TMC2250AKEC相关器件

型号	品牌	获取价格	描述	数据表
TMC2250AKEC2	FAIRCHILD	获取价格	Matrix Multiplier 12 x 10 bit, 50 MHz
TMC2250AKEC2	CADEKA	获取价格	Matrix Multiplier 12 x 10 bit, 50 MHz
TMC2250AKEC3	CADEKA	获取价格	Matrix Multiplier 12 x 10 bit, 50 MHz
TMC2250AKEC3	FAIRCHILD	获取价格	Matrix Multiplier 12 x 10 bit, 50 MHz
TMC2250AKEC3	ROCHESTER	获取价格	Multiplier, 12-Bit, CMOS, PQFP120, PLASTIC, MQFP-120
TMC2250G1V	ROCHESTER	获取价格	Multiplier, CMOS
TMC2250G1V1	RAYTHEON	获取价格	Multiplier, 12-Bit, CMOS, CPGA121,
TMC2250H5C	FAIRCHILD	获取价格	Graphics Processor, CMOS, PPGA120,
TMC2250H5C1	RAYTHEON	获取价格	Multiplier, 12-Bit, CMOS, CPGA121,
TMC2255R1C1	ROCHESTER	获取价格	8-BIT, DSP-CONVOLVER, PQCC68, PLASTIC, LCC-68

与TMC2250AKEC相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

40
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

32
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

60
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

56

产品中心

服务支持

精选活动

关于我们

帮助中心

TMC2250AKEC

TMC2250AKEC 数据手册

与TMC2250AKEC相关器件

与TMC2250AKEC相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

TMC2250AKEC

TMC2250AKEC 数据手册

与TMC2250AKEC相关器件

与TMC2250AKEC相关文章

您还可以找

您在本页遇到什么问题？