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TLV571IPWR

更新时间： 2024-11-24 12:59:55
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
28页 420K
描述
1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24, PLASTIC, TSSOP-24

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TLV571IPWR 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：PLASTIC, TSSOP-24针数：24
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.66
Is Samacsys：N最大模拟输入电压：5.5 V
最小模拟输入电压：最长转换时间：1 µs
转换器类型：ADC, SUCCESSIVE APPROXIMATIONJESD-30 代码：R-PDSO-G24
JESD-609代码：e4长度：7.8 mm
最大线性误差 (EL)：0.1953%湿度敏感等级：2
模拟输入通道数量：1位数：8
功能数量：1端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
输出位码：BINARY, 2'S COMPLEMENT BINARY输出格式：PARALLEL, 8 BITS
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP24,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：220
电源：3/5 V认证状态：Not Qualified
采样速率：1.25 MHz座面最大高度：1.2 mm
子类别：Analog to Digital Converters标称供电电压：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：NICKEL PALLADIUM GOLD
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

TLV571IPWR 数据手册

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TLV571  
2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT,  
PARALLEL ANALOG-TO-DIGITAL CONVERTER  
SLAS239A – SEPTEMBER 1999 – REVISED FEBRUARY 2000  
features  
applications  
Fast Throughput Rate: 1.25 MSPS at 5 V,  
625 KSPS at 3 V  
Mass Storage and HDD  
Automotive  
Wide Analog Input: 0 V to AV  
DD  
Digital Servos  
Differential Nonlinearity Error: < ± 0.5 LSB  
Process Control  
Integral Nonlinearity Error: < ± 0.5 LSB  
Single 2.7-V to 5.5-V Supply Operation  
Low Power: 12 mW at 3 V and 35 mW at 5 V  
Auto Power Down of 1 mA Max  
Software Power Down: 10 µA Max  
Internal OSC  
General-Purpose DSP  
Image Sensor Processing  
DW OR PW PACKAGE  
(TOP VIEW)  
CS  
WR  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
NC  
AIN  
2
Hardware Configurable  
RD  
3
AV  
DD  
4
CLK  
AGND  
REFM  
REFP  
CSTART  
A1/D7  
A0/D6  
D5  
DSP and Microcontroller Compatible  
Parallel Interface  
5
DGND  
6
DV  
DD  
7
INT/EOC  
DGND  
DGND  
D0  
Binary/Twos Complement Output  
8
Hardware Controlled Extended Sampling  
Hardware or Software Start of Conversion  
9
10  
11  
12  
D1  
D2  
D4  
D3  
description  
The TLV571 is an 8-bit data acquisition system  
that combines a high-speed 8-bit ADC and a  
NC – No internal connection  
parallel interface. The device contains two on-chip control registers allowing control of software conversion start  
and power down via the bidirectional parallel port. The control registers can be set to a default mode using a  
dummy RD while WR is tied low allowing the registers to be hardware configurable.  
The TLV571 operates from a single 2.7-V to 5.5-V power supply. It accepts an analog input range from 0 V to  
AV  
and digitizes the input at a maximum 1.25 MSPS throughput rate at 5 V. The power dissipations are only  
DD  
12 mW with a 3-V supply or 35 mW with a 5-V supply. The device features an auto power-down mode that  
automatically powers down to 1 mA 50 ns after conversion is performed. In software power-down mode, the  
ADC is further powered down to only 10 µA.  
Very high throughput rate, simple parallel interface, and low power consumption make the TLV571 an ideal  
choice for high-speed digital signal processing.  
AVAILABLE OPTIONS  
PACKAGE  
T
A
24 TSSOP  
(PW)  
24 SOIC  
(DW)  
–40°C to 85°C  
TLV571IPW  
TLV571IDW  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...28

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