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TLV5621ED PDF预览

TLV5621ED

更新时间: 2024-11-24 11:06:43
品牌 Logo 应用领域
德州仪器 - TI 光电二极管转换器数模转换器
页数 文件大小 规格书
17页 240K
描述
8 位、10us 四路 DAC,串行输入、简单 2 线接口、可编程 1x 或 2x 输出、断电功能 | D | 14 | -40 to 85

TLV5621ED 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:compliantFactory Lead Time:1 week
风险等级:2.31最大模拟输出电压:2.9 V
最小模拟输出电压:转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:8.65 mm最大线性误差 (EL):0.3906%
湿度敏感等级:1位数:8
功能数量:1端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
采样速率:0.008 MHz座面最大高度:1.75 mm
标称安定时间 (tstl):10 µs子类别:Other Converters
最大压摆率:1.5 mA标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.91 mmBase Number Matches:1

TLV5621ED 数据手册

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TLV5621I  
LOW-POWER QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTER  
SLAS138B – APRIL 1996 – REVISED FEBRUARY 1997  
2.7-V to 5.5-V Single-Supply Operation  
Low Power Consumption  
Half-Buffered Output  
Power-Down Mode  
Four 8-Bit Voltage Output DACs  
One-Half Power 8-Bit Voltage Output DAC  
Fast Serial Interface . . . 1 MHz Max  
applications  
Simple Two-Wire Interface In Single  
Buffered Mode  
Programmable Voltage Sources  
Digitally-Controlled Amplifiers/Attenuators  
Cordless/Wireless Communications  
Automatic Test Equipment  
High-Impedance Reference Inputs For Each  
DAC  
Programmable for 1 or 2 Times Output  
Range  
Portable Test Equipment  
Simultaneous-Update Facility In  
Double-Buffered Mode  
Process Monitoring and Control  
Signal Synthesis  
Internal Power-On Reset  
Industry Temperature Range  
D PACKAGE  
(TOP VIEW)  
description  
The TLV5621I is a quadruple 8-bit voltage output  
digital-to-analog converter (DAC) with buffered  
reference inputs (high impedance). The DAC  
produces an output voltage that ranges between  
either one or two times the reference voltages and  
GND, and the DAC is monotonic. The device is  
simple to use since it operates from a single  
supply of 2.7 V to 5.5 V. A power-on reset function  
is incorporated to provide repeatable start-up  
conditions. A global hardware shut-down terminal  
and the capability to shut down each individual  
DAC with software are provided to minimize  
power consumption.  
GND  
REFA  
REFB  
REFC  
REFD  
DATA  
CLK  
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
DD  
HWACT  
DACA  
DACB  
DACC  
DACD  
EN  
8
Digital control of the TLV5621I is over a simple 3-wire serial bus that is CMOS compatible and easily interfaced  
to all popular microprocessor and microcontroller devices. A TLV5621I 11-bit command word consists of  
eight bits of data, two DAC select bits, and a range bit for selection between the times one or times two output  
range. The TLV5621I digital inputs feature Schmitt triggers for high noise immunity. The DAC registers are  
double buffered which allows a complete set of new values to be written to the device, and then under control  
of the HWACT signal, all of the DAC outputs are updated simultaneously.  
The 14-terminal small-outline (D) package allows digital control of analog functions in space-critical  
applications. The TLV5621I does not require external trimming. The TLV5621I is characterized for operation  
from –40°C to 85°C.  
AVAILABLE OPTIONS  
PACKAGE  
SMALL OUTLINE  
T
A
(D)  
40°C to 85°C  
TLV5621ID  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

TLV5621ED 替代型号

型号 品牌 替代类型 描述 数据表
TLV5621EDR TI

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SERIAL INPUT LOADING, 75us SETTLING TIME, 8-BIT DAC, PDSO14, GREEN, PLASTIC, SOIC-14

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