Datasheet > TLV5535IPW

TLV5535IPW

更新时间： 2024-02-10 00:10:45

品牌	Logo	应用领域
德州仪器 - TI		转换器
页数	文件大小	规格书
32页	535K
描述
8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER

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TLV5535IPW 技术参数

TLV5535

8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER

SLAS221 – JUNE 1999

functional block diagram

–

ADC

SHA

ADC

DAC

Correction Logic

Output Buffers

D0(LSB)–D7(MSB)

The single-pipeline architecture uses 6 ADC/DAC stages and one final flash ADC. Each stage produces a

resolution of 2 bits. The correction logic generates its result using the 2-bit result from the first stage, 1 bit from

each of the 5 succeeding stages, and 1 bit from the final stage in order to arrive at an 8-bit result. The correction

logic ensures no missing codes over the full operating temperature range.

circuit diagrams of inputs and outputs

ALL DIGITAL INPUT CIRCUITS

AIN INPUT CIRCUIT

0.5 pF

REFERENCE INPUT CIRCUIT

D0–D7 OUTPUT CIRCUIT

DRV

Internal

Reference

Generator

REFTO

REFBO

D_Out

REFBI

REFTI

DRV

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

123 4 5 6 7...32

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型号	品牌	描述	获取价格	数据表
TLV5535IPWG4	TI	8-Bit, 35-MSPS Analog-to-Digital Converter (ADC) 28-TSSOP -40 to 85	获取价格
TLV5535IPWR	TI	8 位、35MSPS 模数转换器 (ADC) \| PW \| 28 \| -40 to 85	获取价格
TLV5535IPWRG4Q1	TI	8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER	获取价格
TLV5535IPWRQ1	TI	8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER	获取价格
TLV5535PW	TI	8-BIT, 35 MSPS, LOW-POWER ANALOG-TO-DIGITAL CONVERTER	获取价格
TLV5535PWR	TI	TLV5535PWR	获取价格