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TLC7528CFNG3 PDF预览

TLC7528CFNG3

更新时间: 2024-11-24 12:15:51
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
27页 1031K
描述
DUAL 8-BI MULTIPLYING DIGITAL-TO-ANALOG CONVERTERS

TLC7528CFNG3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QLCC
包装说明:QCCJ, LDCC20,.4SQ针数:20
Reach Compliance Code:compliantFactory Lead Time:6 weeks
风险等级:5.03最大模拟输出电压:10 V
最小模拟输出电压:-10 V转换器类型:D/A CONVERTER
输入位码:BINARY, OFFSET BINARY输入格式:PARALLEL, 8 BITS
JESD-30 代码:S-PQCC-J20JESD-609代码:e3
长度:8.965 mm最大线性误差 (EL):0.3906%
湿度敏感等级:1位数:8
功能数量:1端子数量:20
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:QCCJ
封装等效代码:LDCC20,.4SQ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):260
电源:5/15 V认证状态:Not Qualified
采样速率:10 MHz座面最大高度:4.57 mm
最大稳定时间:0.1 µs标称安定时间 (tstl):0.1 µs
子类别:Other Converters最大压摆率:2 mA
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Matte Tin (Sn)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8.965 mm
Base Number Matches:1

TLC7528CFNG3 数据手册

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ꢊꢋꢌ ꢁ ꢆ ꢍꢎꢉ ꢀ ꢏ ꢋꢁꢀꢉ ꢐ ꢁꢑ ꢉꢒ ꢓ  
SLAS062E − JANUARY 1987 − REVISED NOVEMBER 2008  
DW, N OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
D
Easily Interfaced to Microprocessors  
On-Chip Data Latches  
Monotonic Over the Entire A/D Conversion  
Range  
AGND  
OUTA  
RFBA  
REFA  
DGND  
OUTB  
RFBB  
REFB  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Interchangeable With Analog Devices  
AD7528 and PMI PM-7528  
V
DD  
WR  
Fast Control Signaling for Digital Signal  
Processor (DSP) Applications Including  
Interface With TMS320  
DACA/DACB  
(MSB) DB7  
DB6  
CS  
DB0 (LSB)  
DB1  
D
D
Voltage-Mode Operation  
CMOS Technology  
DB5  
DB2  
DB4  
DB3  
KEY PERFORMANCE SPECIFICATIONS  
FN PACKAGE  
(TOP VIEW)  
Resolution  
Linearity Error  
Power Dissipation at V  
Settling Time at V  
8 bits  
1/2LSB  
20mW  
100ns  
80ns  
= 5V  
DD  
= 5V  
DD  
Propagation Delay Time at V  
DD  
= 5V  
3
2 1 20 19  
REFB  
description  
REFA  
4
DGND  
5
18  
17  
16  
15  
14  
V
DD  
The TLC7528C, TLC7528E, and TLC7528I are  
dual, 8-bit, digital-to-analog converters (DACs)  
designed with separate on-chip data latches and  
feature exceptionally close DAC-to-DAC match-  
ing. Data are transferred to either of the two DAC  
data latches through a common, 8-bit, input port.  
Control input DACA/DACB determines which  
DAC is to be loaded. The load cycle of these  
devices is similar to the write cycle of a  
random-access memory, allowing easy interface  
to most popular microprocessor buses and output  
ports. Segmenting the high-order bits minimizes  
glitches during changes in the most significant  
bits, where glitch impulse is typically the  
strongest.  
WR  
DACA/DACB  
6
7
8
CS  
(MSB) DB7  
DB6  
DB0 (LSB)  
9 10 11 12 13  
These devices operate from a 5V to 15V power supply and dissipates less than 15mW (typical). The 2- or  
4-quadrant multiplying makes these devices a sound choice for many microprocessor-controlled gain-setting  
and signal-control applications. It can be operated in voltage mode, which produces a voltage output rather than  
a current output. Refer to the typical application information in this data sheet.  
The TLC7528C is characterized for operation from 0°C to +70°C. The TLC7528I is characterized for operation  
from −25°C to +85°C. The TLC7528E is characterized for operation from 40°C to +85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
ꢐꢖ ꢔ ꢊꢋ ꢂ ꢀꢉ ꢔ ꢒ ꢊ ꢌꢀꢌ ꢘꢙ ꢚ ꢛꢜ ꢝ ꢞꢟ ꢘꢛꢙ ꢘꢠ ꢡꢢ ꢜ ꢜ ꢣꢙꢟ ꢞꢠ ꢛꢚ ꢤꢢꢥ ꢦꢘꢡ ꢞꢟ ꢘꢛꢙ ꢧꢞ ꢟꢣ ꢨ  
ꢐꢜ ꢛ ꢧꢢꢡ ꢟ ꢠ ꢡ ꢛꢙ ꢚꢛ ꢜ ꢝ ꢟ ꢛ ꢠ ꢤꢣ ꢡ ꢘꢚ ꢘꢡꢞ ꢟꢘ ꢛꢙꢠ ꢤꢣ ꢜ ꢟꢩ ꢣ ꢟꢣ ꢜ ꢝꢠ ꢛꢚ ꢀꢣꢪ ꢞꢠ ꢉꢙꢠ ꢟꢜ ꢢꢝ ꢣꢙꢟ ꢠ  
ꢠ ꢟ ꢞ ꢙꢧ ꢞ ꢜꢧ ꢫ ꢞ ꢜꢜ ꢞ ꢙ ꢟꢬꢨ ꢐꢜ ꢛ ꢧꢢꢡ ꢟꢘꢛꢙ ꢤꢜ ꢛꢡ ꢣꢠ ꢠꢘ ꢙꢭ ꢧꢛꢣ ꢠ ꢙꢛꢟ ꢙꢣ ꢡꢣ ꢠꢠ ꢞꢜ ꢘꢦ ꢬ ꢘꢙꢡ ꢦꢢꢧ ꢣ  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
Copyright 2000−2008, Texas Instruments Incorporated  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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