TLC532AI, TLC532AM, TLC533AI, TLC533AM
LinCMOS 8-BIT ANALOG-TO-DIGITAL PERIPHERALS
WITH 5 ANALOG AND 6 DUAL-PURPOSE INPUTS
SLAS070 – D2819, NOVEMBER 1983 – REVISED SEPTEMBER 1986
N PACKAGE
(TOP VIEW)
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LinCMOS Technology
8-Bit Resolution
Total Unadjusted Error . . . ±0.5 LSB Max
REF –
GND
(MSB)
REF + (A1)
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Ratiometric Conversion
V
2
CC
– 1
Access Plus Conversion Time:
TLC532A . . . 15 µs Max
2
A0
3
– 2
– 3
– 4
– 5
– 6
– 7
2
2
2
2
2
2
A2
4
Analog
Inputs
TLC533A . . . 30 µs Max
A3
A4
A5
5
I/O
Data
Bus
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3-State, Bidirectional I/O Data Bus
5 Analog and 6 Dual-Purpose Inputs
On-Chip 12-Channel Analog Multiplexer
Three On-Chip 16-Bit Data Registers
6
7
A10/D1
A11/D2
A12/D3
A13/D4
A14/D5
A15/D6
R
8
9
– 8
Analog/
Digital
Inputs
2
(LSB)
R/ W
CLK
RS
10
11
12
13
14
Software Compatible With Larger TL530
and TL531 (21-Input Versions)
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On-Chip Sample-and-Hold Circuit
Single 5-V Supply Operation
CS
Low Power Consumption . . . 6.5 mW Typ
FN PACKAGE
(TOP VIEW)
Improved Direct Replacements for Texas
Instruments TL532 and TL533, National
Semiconductor ADC0829, and Motorola
MC14442
description
4
3 2 1 28 27 26
The TLC532A and TLC533A are monolithic
– 3
5
2
A2
A3
A4
25
24
23
LinCMOS peripheral integrated circuits each
designed to interface a microprocessor for analog
data acquisition. These devices are complete
peripheral data acquisition systems on a single
chip and can convert analog signals to digital data
from up to 11 external analog terminals. Each
device operates from a single 5-V supply and
contains a 12-channel analog multiplexer, and
8-bit ratiometric analog-to-digital (A/D) converter,
a sample-and-hold circuit, three 16-bit registers,
and microprocessor-compatible control circuitry.
Additional features include a built-in self-test,
sixmultipurpose (analog or digital) inputs, five
external analog inputs, and an 8-pin input/output
(I/O) data port. The three on-chip data registers
store the control data, the conversion results, and
the input digital data that can be accessed via the
microprocessor data bus in two bytes
– 4
– 5
– 6
– 7
6
2
2
2
2
7
8
22 A5
9
A10/D1
21
– 8
10
11
2
(LSB)
R/ W
20 A11/D2
19 A12/D3
12 13 14 15 16 17 18
FUNCTION TABLE
ADDRESS/CONTROL
R/W RS CS CLK
DISCRIPTION
R
†
H
H
H
H
X
L
H
H
X
X
H
L
H
X
X
L
L
L
H
L
Reset
↓
↑
↑
Write bus data to control register
Read data from analog conversion register
Read data from digital register
No response
X
H=High-level, L = Low-level, X = Irrelevant
↓=High-to-low transition, ↑ = Low-to-high transition
†
For proper operation, RESET must be low for at least three lock cycles.
LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1986, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265