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TLC34058-135GA PDF预览

TLC34058-135GA

更新时间: 2024-11-23 20:06:39
品牌 Logo 应用领域
德州仪器 - TI 时钟外围集成电路
页数 文件大小 规格书
26页 392K
描述
1280X1024 PIXELS PALETTE-DAC DSPL CTLR, CPGA84, CERAMIC, GA-84

TLC34058-135GA 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:PGA包装说明:PGA,
针数:84Reach Compliance Code:not_compliant
ECCN代码:3A001.A.3HTS代码:8542.31.00.01
风险等级:5.9地址总线宽度:2
总线兼容性:TMS340XX最大时钟频率:135 MHz
显示配置:1280 X 1024 PIXELS外部数据总线宽度:8
JESD-30 代码:S-CPGA-P84长度:32 mm
端子数量:84最高工作温度:70 °C
最低工作温度:封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:PGA封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):NOT SPECIFIED
认证状态:Not Qualified座面最大高度:5.21 mm
最大供电电压:5.25 V最小供电电压:4.75 V
标称供电电压:5 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子形式:PIN/PEG端子节距:2.54 mm
端子位置:PERPENDICULAR处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:32 mmuPs/uCs/外围集成电路类型:DISPLAY CONTROLLER, PALETTE DAC
Base Number Matches:1

TLC34058-135GA 数据手册

 浏览型号TLC34058-135GA的Datasheet PDF文件第2页浏览型号TLC34058-135GA的Datasheet PDF文件第3页浏览型号TLC34058-135GA的Datasheet PDF文件第4页浏览型号TLC34058-135GA的Datasheet PDF文件第5页浏览型号TLC34058-135GA的Datasheet PDF文件第6页浏览型号TLC34058-135GA的Datasheet PDF文件第7页 
TLC34058  
256 × 24 COLOR PALETTE  
SLAS050 – D3961, NOVEMBER 1991  
LinEPIC 1-µm CMOS Process  
125-MHz Pipelined Architecture  
Direct Interface to TMS340XX Graphics  
Processors  
Standard Microprocessor Unit (MPU)  
Available Clock Rates . . . 80, 110, 125,  
Palette Interface  
135 MHz  
Multiplexed TTL Pixel Ports  
Dual-Port Color RAM  
256 Words x 24 Bits  
Triple Digital-to-Analog Converters (DACs)  
Dual-Port Overlay Registers . . . 4 × 24 Bits  
5-V Power Supply  
Bit Plane Read and Blink Masks  
EIA RS-343-A Compatible Outputs  
Functionally Interchangeable With  
Brooktree Bt458  
description  
TheTLC34058color-paletteintegratedcircuitisspecificallydevelopedforhigh-resolutioncolorgraphicsinsuch  
applications as CAE/CAD/CAM, image processing, and video reconstruction.  
The architecture provides for the display of 1280 × 1024 bit-mapped color graphics (up to 8 bits per pixel  
resolution) with 2 bits of overlay information. The TLC34058 has a 256-word × 24-bit RAM used as a lookup  
table with three 8-bit video D/A converters.  
On-chip features such as high-speed pixel clock logic minimize costly ECL interface. Multiple pixel ports and  
internal multiplexing provide TTL-compatible interface (up to 32 MHz) to the frame buffer while maintaining  
sophisticated color graphic data rates (up to 135 MHz). Programmable blink rates, bit plane masking and  
blinking, color overlay capability, and a dual-port palette RAM are other key features. The TLC34058 generates  
red, green, and blue signals compatible with EIA RS-343-A and can drive, without external buffering, 75-Ω  
coaxial cables terminated at each end.  
AVAILABLE OPTIONS  
DAC  
RESOLUTION  
PACKAGE  
Ceramic Grid Array (GA)  
T
A
SPEED  
Plastic Chip Carrier (FN)  
TLC34058-80FN  
80 MHz  
110 MHz  
125 MHz  
135 MHz  
8 Bits  
8 Bits  
8 Bits  
8 Bits  
TLC34058-80GA  
TLC34058-110GA  
TLC34058-125GA  
TLC34058-135GA  
0°C  
To  
70°C  
TLC34058-110FN  
TLC34058-125FN  
TLC34058-135FN  
LinEPIC is a trademark of Texas Instruments Incorporated.  
Brooktree is a registered trademark of Brooktree Corporation.  
Copyright 1991, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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