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TLC1551IJ

更新时间： 2024-11-19 22:49:47
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德州仪器 - TI 转换器输出元件
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9页 141K
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10-BIT ANALOG-TO-DIGITAL CONVERTERS WITH PARALLEL OUTPUTS

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TLC1551IJ 数据手册

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TLC1550I, TLC1550M, TLC1551I  
10-BIT ANALOG-TO-DIGITAL CONVERTERS  
WITH PARALLEL OUTPUTS  
SLAS043C – MAY 1991 – REVISED MARCH 1995  
†
Power Dissipation . . . 40 mW Max  
J
OR NW PACKAGE  
(TOP VIEW)  
Advanced LinEPIC Single-Poly Process  
Provides Close Capacitor Matching for  
Better Accuracy  
REF+  
REF–  
ANLG GND  
AIN  
RD  
WR  
CLKIN  
CS  
D9  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
2
Fast Parallel Processing for DSP and µP  
Interface  
3
4
Either External or Internal Clock Can Be  
Used  
ANLG V  
5
DD  
DGTL GND1  
DGTL GND2  
D8  
6
D7  
7
Conversion Time . . . 6 µs  
Total Unadjusted Error . . . ±1 LSB Max  
CMOS Technology  
DGTL V  
D6  
8
DD1  
DGTL V  
DD2  
D5  
9
EOC  
D0  
D1  
D4  
D3  
D2  
10  
11  
12  
description  
The TLC1550x and TLC1551 are data acquisition  
analog-to-digital converters (ADCs) using a 10-bit,  
†
Refer to the mechanical data for the JW  
package.  
switched-capacitor,  
successive-approximation  
FK OR FN PACKAGE  
(TOP VIEW)  
network. A high-speed, 3-state parallel port directly  
interfaces to a digital signal processor (DSP) or  
microprocessor (µP) system data bus. D0 through  
D9 are the digital output terminals with D0 being the  
least significant bit (LSB). Separate power  
terminals for the analog and digital portions  
minimize noise pickup in the supply leads.  
Additionally, the digital power is divided into two  
parts to separate the lower current logic from the  
higher current bus drivers. An external clock can be  
applied to CLKIN to override the internal system  
clock if desired.  
4
3
2 1 28 27 26  
5
AIN  
ANLG V  
DGTL GND1  
NC  
DGTL GND2  
25 CS  
24 D9  
6
DD  
7
D8  
NC  
D7  
D6  
D5  
23  
22  
21  
20  
19  
8
9
DGTL V  
10  
11  
DD1  
DGTL V  
DD2  
The TLC1550I and TLC1551I are characterized for  
operation from –40°C to 85°C. The TLC1550M is  
characterized over the full military range of –55°C  
to 125°C.  
12 13 14 15 16 17 18  
NC – No internal connection  
AVAILABLE OPTIONS  
PACKAGE  
T
A
CERAMIC CHIP CARRIER PLASTIC CHIP CARRIER  
CERAMIC DIP  
(J)  
PLASTIC DIP  
(NW)  
(FK)  
(FN)  
TLC1550IFN  
TLC1551IFN  
TLC1550INW  
–40°C to 85°C  
–55°C to 125°C  
–
–
–
TLC1550MFK  
–
TLC1550MJ  
–
This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These  
circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C,  
Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated  
voltages to these high-impedance circuits. During storage or handling, the device leads should be shorted together or the device  
should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriated logic voltage level,  
preferably either V  
or ground.  
CC  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Advanced LinEPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1995, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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