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ꢇꢈ ꢉ ꢇꢊꢋ ꢁ ꢌꢍꢊꢎꢆꢀ ꢌꢅ ꢋꢈ ꢏꢉ ꢁ ꢌꢊꢋꢐꢑ ꢑꢁꢒ ꢓ ꢑꢌꢎ ꢆꢀ ꢈꢓ ꢏꢆꢁ ꢆꢔ ꢑ ꢁꢈ ꢕꢈ ꢌꢎ ꢋ
SLVS461B − JANUARY 2003 − REVISED JULY 2003
D, N, OR PW PACKAGE
(TOP VIEW)
D
D
D
D
D
Low Offset . . . 3 mV (Max) for A-Grade
Wide Gain-Bandwidth Product . . . 4 MHz
High Slew Rate . . . 13 V/µs
Fast Settling Time . . . 1.1 µs to 0.1%
Wide-Range Single-Supply Operation
. . . 4 V to 36 V
1
2
3
4
5
6
7
14
13
12
11
10
9
1OUT
1IN−
1IN+
4OUT
4IN−
4IN+
V
V
/GND
CC+
2IN+
CC−
3IN+
3IN−
3OUT
D
Wide Input Common-Mode Range Includes
Ground (V
2IN−
2OUT
)
CC−
8
D
Low Total Harmonic Distortion . . . 0.02%
D
Large-Capacitance Drive Capability
. . . 10,000 pF
D
D
Output Short-Circuit Protection
Alternative to MC33074/A and MC34074/A
description/ordering information
ORDERING INFORMATION
V
max
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
IO
AT 25°C
†
PACKAGE
T
A
PDIP (N)
SOIC (D)
Tube of 25
Tube of 50
Reel of 2500
Tube of 90
Reel of 2000
Tube of 25
Tube of 50
Reel of 2500
Tube of 90
Reel of 2000
Tube of 25
Tube of 50
Reel of 2500
Tube of 90
Reel of 2000
Tube of 25
Tube of 50
Reel of 2500
Tube of 90
Reel of 2000
TL3474ACN
TL3474ACD
TL3474ACDR
TL3474ACPW
TL3474ACPWR
TL3474CN
TL3474ACN
TL3474A
A-grade:
3 mV
TSSOP (PW)
PDIP (N)
T3474A
0°C to 70°C
TL3474CN
TL3474CD
SOIC (D)
TL3474C
Standard grade:
10 mV
TL3474CDR
TL3474CPW
TL3474CPWR
TL3474AIN
TSSOP (PW)
PDIP (N)
TL3474
Z3474A
TL3474AID
SOIC (D)
TL3474AI
A-grade:
3 mV
TL3474AIDR
TL3474AIPW
TL3474AIPWR
TL3474IN
TSSOP (PW)
PDIP (N)
Z3474A
−40°C to 105°C
TL3474IN
TL3474ID
SOIC (D)
TL3474I
Z3474
Standard grade:
10 mV
TL3474IDR
TL3474IPW
TL3474IPWR
TSSOP (PW)
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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1
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